The Next 15 years Of Logic Chip Technology -- How to Invest?
Hey, everybody. Welcome back to chip stock investor. We're gonna be talking about a really interesting topic today, and we're going to be explaining it in 20 minutes.
I said 15, but you're probably right. It will be longer than that. Yeah, we'll see how this all ends up.
We may have to edit this slide one more time, but we're going to be talking about how to invest in the next 15 years of logic chip architecture advancement. We have some investor days from ASML and LAM research and we're using some of their slides in this presentation today to help you understand where exactly we're going in logic chip architecture. Before we continue, quick ad from the sponsor of today's video, public. com. If you're serious about investing, you really need to know about public. com.
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com for full disclosures, check out the video description. Thanks public. And so when we're discussing the development of chip manufacturing and chip architecture, as we've discussed many times in the past, the wafer fab and packaging companies are where it's at specifically the fab five make up the primary critical choke point where a lot of these actual semiconductor manufacturing processes are developed and where they reside. So when we say the Fab 5, Kasey, you already mentioned two of them, but here's the full list. What we call the Fab 5, ASML, the lithography specialist, Applied, Lam Research and Tokyo Electron, the three generalists, and then KLA Corp, another specialist in metrology and PDC process diagnostic and control earning season is over and we've received some insight into the many years to come for logic chip advancement, and these are some of the key takeaways from this earning season.
2025 is still going to be a strong year of growth for the semiconductor industry. However, fabs are being cautious with their spending and trying to get more done with the tools they have. That said, NVIDIA's accelerated computing advancements are the strongest outlet for industry growth, and that looks like that will continue.
In into 2025, maybe even into 2026, too early to say. Offsetting sales of fab equipment to China. That is normalizing as the fab five have worked through their backlog of equipment to China. However, these companies have been talking about the GAA transition that should be driving a new wave of growth, especially the second half of 2025. That is what we have been calling the so called U shaped recovery 2023 2024, largely still recovering from the bear market for most of the semi industry, but things starting to heat up again for the fab equipment players, the second half of 2025.
And so what is G. A. A. Or gate all around? What is this big transition inflection point now to tee up what this GAA transition is, let's start with ASML investor day. That was all the way back in November. At this point, been sitting on these slides in this discussion until now. Kasey walk us through these next couple of slides. This first one illustrates just how much the semiconductor industry is going to grow over the next few years.
This one is out till 2030. We expect that semiconductor sales will surpass $1 trillion by that time. But key in on that center block there on data center servers and storage.
That's become the largest end market for chips. And hopefully we'll continue to be the primary driver of industry growth for the next five years, also known as a secular growth trend. At ASMLs investor day, they said by 2030, they expect that their revenue will be somewhere between 45 and 60 billion euro. Now it's important to remember that this revenue is not going to be going up just in a straight line. There is some cyclicality involved with this even though it's a secular growth trend and 2024 was a perfect example of that. Yeah, that's right.
Not such a great year for ASML. We discussed that at length across multiple videos. However, they are one of the first ones to talk about this GAA Transition that will start to heat up in 2025.
And they provided this slide. That's really interesting when talking about the different customers and customers of their customers that are driving some of this new chip design and chip architecture. Kasey, this is a weird slide because, uh, not all of these businesses are semiconductor businesses. What do they have to do with ASML? Yeah, you're absolutely right. This is interesting because a couple of years ago, many investors may have balked at a chart like this because you can see Apple, Microsoft, Google, Meta. All of these companies taking a huge chunk of the pie when it comes to chip design, but now fast forward to 2024, most investors are very, very aware of the fact these companies are driving this chip design across what we traditionally consider as the tech industry, as well as communications, the auto industrial market.
Just about every market is touched by semiconductors. Chips aren't the new oil, data is, but chips are modern infrastructure that every modern business needs to be concerned with in the 21st century. For patient investors, there is a massive amount of money being spent on R& D for new types of logic chips. All of that is ultimately to ask the question, what are we talking about when we say GAA or gate all around? What does that transition mean for the future of logic chips? Okay, so this chart, hopefully you're familiar with now. We put this together back in early 2024, but we're going to be reviewing the four basic primary steps involved with shaping the microscopic features on a chip. Actually, I should say maybe more specifically on a silicon wafer.
Deposition, lithography, etch, and cleaning. These steps are repeated dozens of times to craft the features on a silicon wafer before they're chopped up into chips. And it's ASML's lithography equipment that is one of the key processes in making those microscopic features.
So ultraviolet light is used to print these tiny patterns onto the silicon wafer. Uh, it interacts with material that is deposited onto the wafer and then parts of, of the chip that didn't interact with the UV light are etched away, it's cleaned, and then the process goes again with a new, new shapes and features drawn onto the chip. So you probably know right now, currently we are on the rollout of ASML's high NA machine. Uh, that NA referring to the numerical aperture, we're at the 0.
55 numerical aperture. Displayed there in the bottom right of this chart. Sometime at the end of this decade or the beginning of the 2030s, there'll be another high NA EUV machine with a 0.75 numerical aperture that will further increase the resolution of the printed designs on the silicon wafers. And the reason why this is important is in that November investor day update, A SML provided about 15 years worth of visibility into the most important feature of those printed circuit designs in this slide right here.
This is the architecture of the transistor. On the top row is listed the general process nomenclature. The last two years, TSMC has been rolling out its N3 or 3 nanometer node. Just a reminder, that doesn't refer to the actual feature size of the transistor, but rather to the old feature size equivalent using old chip architecture and chip manufacturing node naming. We'll get to that in just a moment. And so what is the GAA transition in 2025? In the first row of this chart, you can see N two is listed.
This is the beginning of what is being called the nano sheet, where depending on who you ask, uh, nanowire or Intel's calls it ribbon fat technology. For our purposes here, let's just call it GAA or gate all around logic chip architecture, and this is going to be an evolving technology architecture through potentially 2040. You can see the evolution of that GAA shape in the second row with the little shapes of the transistors in red. So let's delve into this a little bit further and talk about what GAA actually is and why it's different from the previous chip technology that we've been using for the last 10, 15 years.
This is a simplified picture of the design of the transistor. The microscopic device that is responsible for the ones and zeros that make our software, make our computers work. For decades under Moore's law, we were primarily dealing with planner FET or the FET stands for field effect transistor. Imagine that red block being the gate. On the left side of the block is the source of the electrical signal and on the right side is the drain. That red block or gate uses an electric field that controls the flow of electrons, thus the FET in the name.
When that electric field gate is closed, the flow of electrons stop, which is the zero. And when it is open, the electrons flow through, which is the one. However, as these As little features have shrunk in size, the green channels were no longer to be able to be controlled by that small electric field created by the red block. And so these channels were raised to make contact with the gate, like a shark fin poking out from the surface of the water.
That's where the name FinFET came from. This architecture was first released in 2011 by Intel, and then a couple years later, Samsung and TSMC also use this architecture. In this illustration, you see FinFET in the top left, that's the architecture we're currently using, and then GAA gate all around in the bottom right. At three nanometers, the power of that FinFET architecture is starting to break down, so we're making the transition to new architecture. gate all around or GAA. As we enter the two nanometer and smaller era logic chips, starting with TSMC and Intel and Samsung, if they are ever able to get their stuff together at Intel, they're going to be offering that as well.
There are some great videos on the manufacturing steps involved in making these tiny GAA features. from Applied ASML LAM Research. We'll link some of those videos in the video description below, so you can check it out.
Including one of our favorites from Asianometry. Check out that YouTube video for more details on how GAA GATE All Around is manufactured. Quick rundown though, it involves Nano sheets. That's where one of the GAA names comes from. Nano sheets of alternating layers of silicon and silicon germanium.
And then the silicon germanium is Etched away to create those little horizontal looking discs or nanowires sticking out of the block. For the next two years, we'll be making that transition from FinFET to GAA. But what about after that? As we get closer to 2030, you're likely going to be hearing more about CFET or complementary FET. We pulled this side view schematic from Synopsys of the logic gate and a little side view of all of these FETs. So in this side view of, of these little, these little fins and the little discs or the nanowires you see some in blue and some in red.
Blue is what is called NFETs or the source where the electrons are flowing from and then red are called PFETs or the drain. This is where the electrons flow to after they cross the gate. So in both FinFET and gate all around architecture, you can see that the NFETs and the PFETs are placed side by side. CFET, in this proposed CFET architecture, which we may start to see experimentation with at the end of this decade or in the early 2030s, the NFETs and the PFETs are stacked on top of each other to save space and further increase the performance of the ultimate chip.
This schematic from IMEC, a research organization out of Belgium. This shows how all of this could play out in that illustration between GAA and CFET. You can see fork sheet that has that gray bar that separates the N side and the P side from one another. Later on, though, technologies are currently being researched that would develop the N and P FETs separately and perhaps use some sort of wafer bonding to stack them on top of each other. Or maybe a sequential process that builds these FETs up to create a new Type of wholly integrated 3d transistor. So ultimately Nick, what does all this mean for ASML and the other companies in the fab five? Yeah, the GAA gate all around transition is creating a new inflection point.
Or a new cycle of growth for the fab five new processes means new equipment needs to be developed and sold. And that new process for GAA and later on for CFET, uh, can continuously be perfected over time to further increase, uh, the performance of the ultimate chip, uh, as well as how the actual manufacturing process goes on, making the manufacturing more efficient, making it more cheaper, uh, the materials used. Uh, less wasteful. And so as companies like ASML develop this, they increase the demand of a new process like GAA. And so more machines get sold, uh, ASML's service based revenue for that, for those machines increases as well. And it's a similar story for the other fab five and really all companies that participate in this sub industry of the semiconductor supply chain.
And so ASML, obviously the dominant player in lithography is a key part of this R and D process, but the other companies involved in this as well. The complimentary peers of ASML that do things like deposition and etch are also going to play an important role as well. And that's where Lam Research's Investor Day update in February 2025 comes into play. Yeah, Lam was the other company of the Fab Five to mention not only the GAA transition, but also the coming CFET transition at their Investor Day in February. They have a blog article that explains CFETs and the R& D process that is needed to pull off stacking NFETs and PFETs on top of one another.
We'll link that article in the video description below if you want to check that out. The point is the transition to another architecture, GAA and eventually CFET architecture transition, is going to require new types of equipment for the process involved. For example, advanced deposition methods like ALD or atomic layer deposition and selective etch using plasma, or ionized matter are going to be required for GAA. More precise versions of deposition and etch processes used for GAA will be needed for CFET in approximately five years. That's right. And, and this is why ASML has been talking up it's high NA EUV machines and then LAM Research, it's various new product families to support this GAA gate all around logic chip architecture movement.
This isn't going to be a full blown revolution. Uh, GAA really just builds on past advancements in the semiconductor manufacturing space. But the introduction of these new manufacturing processes is what drives the cycles of growth that the Fab Five go through, since they are largely the ones responsible for developing these specific manufacturing technology processes. And as we've stated before, these cycles of growth can be Uh, gut wrenching 2023 2024.
Not such great years for for many of the fab five and their related stock prices. But that's kind of the name of the game here. A new cycle of growth eventually kicks in every couple of years, but you have to be able to understand and mentally and emotionally deal with those periods where growth takes a step back again, while the industry kind of retools for what comes next. Speaking of what comes next.
Now, Kasey, we promised this is 15 years worth of semiconductor chip architecture technology. Let's go back to that slide from ASML and IMEC from earlier. Yeah, these architectures, GAA, Forksheet, CFET, likely get us out to at least 2035.
That's ASML's estimate. We would say probably give it another few years because we have to face the facts. The equipment to make these architectures, these transistors, is very, very expensive. And manufacturers Would really like to extend the use of their current manufacturing line for as long as they possibly can. So what about the second half of the 2030s? What is the 2D FET? We have listed a study that's published in the journal Nature on this. The evolution of the CFET in the 2030s could really get interesting as new materials other than silicon and silicon oxide are being experimented with to further drive the performance of the transistor.
And there you have it. 15 years worth of chip technology and R& D. The 2DFET name, maybe even the CFET name, may change and take on different forms, but currently that is the ultra long outlook from companies like ASML and the Fab 5. Things that are currently in early stages of development. R& D. Now for this discussion, we have only been talking about logic chip architecture development.
There's a lot going on in, in memory and in networking. Especially in high bandwidth memory, DRAM chips. There is plenty of talk out there right now about this bottleneck, this networking bottleneck between the memory and the logic chip, especially in these data center servers that power very, very large workloads like AI. We actually think this is less of a bottleneck than many are discussing. We think the real bottleneck is actually in the quality of data available for these future AI applications. But just digress on that for a moment.
But one way companies are already beginning to experiment with solving this networking bottleneck between memory And the logic is actually just taking some of the logic functionality and placing it directly in the HBM itself. But that is a discussion for another time. Before we go into that first, we need to discuss the current landscape of the memory chip. IDMs, companies like Micron, SK hynix, Samsung, we're going to get to that in our next segment of the semiconductor industry flow and in our discussion of the supply chain and further discuss about how the groundwork has already been laid for the commoditization of HBM memory for these AI data center servers. Especially by companies like NVIDIA and Broadcom. Stay tuned for that video, hopefully in the next few weeks.
Let's answer that question we posed at the outset. How do you invest in the next 15 years of logic chip architecture technology development? A basket holding in the fab five, although cyclical is a great place to start. These companies are peers and they do compete with one another, especially when they're transitioning to a new technology.
Lim made some points about this on some of those previous slides we showed you about taking market share away from other. Other companies, other peers in the fab five, but in our view, taken collectively as a type of single position, the fab five will likely continue to dominate the wafer fab packaging sub industry. We own a basket of the fab five, ASML, Applied Materials, LAM Research, and KLA. We don't own Tokyo Electron. That's the only one of the fab five we don't have in our portfolio.
And we also added some smaller players onto, and most recently Camtek and Nova that are in the metrology space. Make sure to check out Semi Insider. Uh, you, with that you get access to all of our show notes and our Discord server where you can discuss with us reasons why we're allocating money, where we are within the semiconductor space.
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2025-03-10 14:08
