PCB Challenges for 5–6 GHz Radar Design
hello everyone welcome back to Altium Academy I'm your host Zack Peterson and today we're going to be looking at a great viewer question all about frequency modulated continuous wave radar now I got a great viewer question on my LinkedIn and it is all about how to design frequency modulated continuous wave radar as a project at 5 to 6 GHz we're going to look at some of the challenges of actually doing this we're going to see whether or not it's feasible and some of the features that you could expect in your PCB let's go ahead and get started so in this video we're going to look at how to design radar systems specifically for the 5 to 6 GHz range now if you've ever looked at any of the radar trainer options that are out there on the market most of them are operating at much higher frequencies in the 24 GHz range although that range is pretty much dead at this point and in the 77 GHz range and that is primarily for automotive there are also transceivers in the 60 gtz range that is more for industrial scientific purposes now this question of operating in the 5 to 6 GHz range all came about because of a really great question I got on LinkedIn let's take a look hi Zach I'm Kwai I've recently learned about RF design and tried out PCB design in altum your videos have been really helpful for learning PCB design hey thank you so much it's always nice to hear that I want to challenge myself by working on an fmcw radar as I think it would be a good learning experience working with the common blocks in RF I'm thinking of Designing all the blocks myself with discrete components for learning I'm thinking of working in the 5 to 6 gtz range and getting everything on a PCB do you think this frequency range is feasible with discrete components now there are multiple questions within this message so I'm going to address each one of them individually and the first question is really about feasibility at 5 to 6 GHz technically sure if you gather all of the discrete components and you design the entire signal chain and you design the antennas and everything yes it is possible to design a radar system operating at 5 to 6 GHz it's also possible to do all of the signal processing yourself on for example an fpga or you could write an application that does it run it on an mpu maybe even on an MCU don't quote me on that I don't know if anybody's done it but it is technically possible to do it first let's take a look at what you're actually going to be designing from a high level and then we'll get a little more granular and I think we'll be able to start to see whether or not this is really feasible first let's take a look at the signal chain for a radar so here on screen I have an image from a Blog on the altm website that I published a few years ago and what this blog is looking at is the overall signal chain that's used to broaden radar signals and then bring back the received signal into an ADC where it can eventually be processed so you're going to run some rang finding algorithms on that received signal and then you're going to determine the range and the heading for whatever objects you've identified from that received signal now what we're looking at here is that we start with a synth we're basically synthesizing a signal at the required frequency and because we're dealing with fmcw or frequency modulated continuous wave radar the synthesizer is also changing the frequency of the signal as it creates it so that's called applying a chirp and typically you apply a linear chirp to these signals when used in radar now that synth eventually gets over to a power amp and then the power amp amplifies the signal and then sends it out to some antennas where it is then broadcast now the antennas that you see here I've set up as a phased array so really what you would have is you would have one of these blocks for every single broadcasting element in your phased array now a phased array could have just a few elements it could have a dozen elements really anything in between and if you start to look at some of the newer radar modules that are intended for really fine resolution tracking of objects from a vehicle you'll see that they actually can have dozens of antennas on them so here what you see is essentially a bunch of patch antennas and the idea here is to use all all of these patch antennas as a phased array each one would get its own power amp and that power amp broadcasts the signal to each antenna these antennas also contain receive elements so some of these antennas are configured for receiving the reflected signal from the object that the radar is trying to track so that reflected signal gets collected by these antennas it then goes into a low noise amplifier it then goes into a mixer there's a reference oscillator that is mixed in this mixer you then extract that reflected signal using the mixer and a bandpass filter and then you go over to an ADC so the ADC eventually collects that signal and then the ADC is going to feed its digital output to your system host which in a lot of these systems is generally an fpga you're then running all of those algorithms to extract the range and heading for that object in the fpga and now your radar can do object tracking so now let's take a look at what one of these systems looks like in a reference design now here inside of Altium designer I have a reference design from Texas Instruments pulled up and if we just put this in 3D we can see what this looks like now this reference design uses an awr series transceiver and this awr transceiver broadcasts at 77 GHz uh with a 6 GHz bandwidth so this 77 GHz radar is intended for automotive applications of course you could use it for robotics or other applications but primar rely it's use as Automotive now here on this design you can see we have some antennas on the design and then we have these laid out as c-plan or wave guides we have a bunch of Vias here that form the co-planner structure and then we have some dummy antennas here on the receive side so here these two antennas make up your transmit side and then these four antennas with the two dummies make up the receive side now the way this is configured you can see here is typically these use series-fed patch antennas why series-fed patch antennas well series-fed patch antennas can get high gain in the broadcast Direction when you apply more and more of these patches in series now of course as you apply more patches in series the size of the antenna gets very large um but of course you can then get higher gain so that's the tradeoff with using this antenna design now you could use patch antennas patch antennas are just fine to use but typically we like to use series-fed patch antennas because you can then broadcast within a plane and so you can define a plane where the radar is looking and essentially it is broadcasting its beam within that plane to then attempt to find an object and that's essentially the situation you would have in automotive with Automotive you're driving along One Direction you're essentially moving in a plane and so you want to look for objects within that plane and that's why these antennas are used now remember this is a 77 GHz radar and you can see here in this 77 GHz radar we we have some patches and these patches if we measure them you'll find that they have a pretty small size so here I'm just measuring the lateral length of one of these patches and you can see here it's 38.1 n m or 1 mm um if we just measure the other dimension you can see here same kind of thing right basically 1.5 mm what would the size of the patch need to be if you wanted to broadcast at let's say 6 GHz well if you go on to the altm website you will find a Blog that I created that has a micr strip patch calculator built into it and we actually did a video on microstrip patch antennas previously and you can find that video link in the description let's just do a really quick calculation of what the size of the patch would need to be given the same stackup that we have in the Texas Instruments design if I just zoom out here you can see what the parameters are for the stackup here they're using a 4 mil thick sheet with 3.66 dialectric constant so let's go
ahead and put that in here if we have a 4 mil sheet of dialectric at 3.66 dialectric constant we're operating at 6 GHz we can see here that the size of our patch is extremely large it's a 645 mil wide patch 511 mil long patch that's pretty big unfortunately that's not really going to be feasible to use in an antenna array you're going to need need to find some other antenna solution that can broadcast at that frequency without being excessively large now let's jump back into this design for just a moment here if we just scroll over to this part of the design you can see here we only have a single component that's running this entire system this is a system on chip you can see here it's in a BGA package it includes all of the synthesis and amplification stages built into it now you're talking about doing a design with discrete components where you would basically have one component that's doing synthesis another component that's doing amplification well we actually have an example project where we looked at some of those elements and that's our power amplifier module project now here inside of our power amplifier module project you can see here that we actually have some of those elements already selected we have here a oscillator this is a voltage controlled oscillator so that's what you're going to need to use to generate the signal and then modulate the frequencies you're going to need to find some way to do that on pretty fine levels in order to create linear chirp next you can see over here that we have our power amplifier so there are a lot of power amplifiers that will operate in the 5 to 6 GHz range I like hittite microwave components they're a little more expensive but I like them for these kinds of applications so I recommend you look at that manufacturer now there's something else that happens with the power amplifier because a lot lot of times we like to run power amplifiers somewhat close to their linear saturation limit when you run a power amplifier near its linear saturation limit you get sideband generation or you get inter modulation products now here just as an example we can see what's happening in these four graphs on this image on screen when we initially generate our frequency modulated signal we have a single frequency that we're outputting but that frequency is changing over time because we've applied linear chirp and what we end up getting after amplification and a little bit of filtering is we then get some intermodulation products that exist to the left and to the right of our desired signal so all of that can get sent to the TX antenna and then some of that noise can get reflected and then come back to the RX antenna now once that's received by the RX antenna it looks like this image in the lower right portion of the graph then it goes through amplification and filtering again using our LNA and then using our BPF and then we get out something that looks kind of like this so as you attempt to apply higher and higher power amplification to that signal you're going to risk getting more and more inter modulation products and then when those come back into the receive side they could interfere with the signal that you're trying to collect so keep that in mind you can't turn up the power too much otherwise you're actually going to create more noise that's more difficult to deal with let's take a look at another point that we have to look at on this power amplifier module now on this power amplifier if we go over here to the schematics you see here that we have this connection directly onto the RF output line and you can see here in this RF output line that pin is actually shared with our input voltage that's kind of a weird way to do it but you can actually power some power amplifiers through the RF output pin and the circuit that's used to do this is called a bias T So this bias T essentially filters out the RF signal from entering the vdd pin and then it prevents the DC signal from going through the output over here to J1 you may need to design a circuit like a bias T using these discrete components if you are going to design for example this bias te using discrete components you're going to need to make sure that you select inductors capacitors resistors that are rated for the fre quy that you want to operate in now there's a reason why when you look at this design in the Texas Instruments reference design that you don't see any of those components in this design that's because at 77 GHz the frequency where you're trying to operate at those components are not going to function as resistors or capacitors anymore for example if you have a capacitor it may not function like a capacitor anymore when you try to put a 77 GHz signal through it so you need to select highfrequency discret components that are rated at the frequency of operation that you want to use in your design we've done another video about this make sure to check out the link in the description to learn more about high frequency passives I think we've covered a lot of the issues with the components so let's go ahead and check out the next part of this question as this is a hobby project I'm thinking of using f fr4 with enig plating to keep the cost considerably low I understand that fr4 is not recommended for high frequencies but will the losses be tolerable at a around 6 GHz so I can tell you with 100% confidence yes with most fr4 Blends the losses will be tolerable at about 6 GHz think about this for a second if you're watching this on a computer you're probably using a Wi-Fi router to stream all of that data from your internet signal over to your computer so you can see my lovely face that Wi-Fi router is produced in volumes of hundreds of thousands or millions of units per year just from that manufacturer what material do you think they're using in that Wi-Fi router to keep their costs reasonably low well I can tell you this they're not using Rogers 303 they're not using these super low dek super low loss dialectric they're probably using plain old fr4 or they might be using a higher grade low loss F fr4 now there are a variety of different fr4 materials for example most f4s have a DK of 4.4 to 4.8 they have a loss tangent of 02 if you wanted to use a low loss fr4 you're probably going to be looking for a material from Isola or itch that's spelled itq now these materials that are marketed as low- loss f4s they probably have a DK of around 3.8 to 4.1 and then their lost tangent is only going to be about 0.1 so it's only a little bit lower than the Lost tangent of a standard lowcost fr4 material now the other question here is about the plating and this is an area that I'm always interested in and I have some data here on screen that compares different plating materials in terms of their effect on losses at different frequencies so take a look at this graph here on the right here in this graph on the right what I'm doing is comparing copper with Organic solderability preserve and immersion silver plating now you can see here that with these three platings bare copper which is no plating organic solderability preserve and immersion silver the curves basically sit right on top of each other there is no difference in the loss at all now what happens if we just apply solder mask or we apply immersion tin you can see that there is some additional loss next what about nickel-based platings well the plating that you're referring to enig has the most loss now enepig has slightly better loss loss but enig the one that you're considering does have the most loss because you can see here it's down lowest on the graph now what else do you see well in this graph take a look at the frequency values if we start to look in the low frequency range right around 5 GHz you can see that these curves aren't that different they do start to diverge around a couple of gigahertz so you do notice the plating losses for different plating materials but you don't see a huge difference between enig or enepig or immersion tin or immersion silver in total you only see about maybe A3 dbel per inch loss difference that's not very big of a difference not very significant at all so you could use any of these plating materials for your interconnects and frankly it's unlikely that you're going to notice much difference in terms of the losses where you are going to notice a significant difference is in the cost take a look at the table here on the left here in this table I've included some cost comparisons for the different platings that you see in this graph as well as a cost comparison for hassle which is hot air solder leveling and immersion gold or direct immersion gold now you can see here that the lowest cost options are of course Hassel or organic solderability preserve if you're looking for the lowest cost with the longest shelf life you definitely want to use Hassel if you're looking for a low loss moderate moderate cost plating I would recommend immersion silver right here in the middle of the table once you get to these enig and enepig direct immersion gold platings of course the cost is very high because those platings contain gold so consider a different plating material if cost is the primary concern in this design so that covers the material end of things now of course you're welcome to use a much more advanced Rogers material if you like in the design however be prepared to pay the cost for it let's take a look at the last part of this question do you have any recommendations or anything specific I should be mindful of in the design that's a great question I think I've covered a lot of different points surrounding materials and surrounding component selection that are going to impact what you do with this project however one thing I would like to point out is that if you are using an fpga system host it's probably going to have to be packaged in a BGA why do I bring that up well if you're using an antenna array you're going to have a lot of discrete components powering each portion of that signal chain and each of those components needs to be configured and that means you have to dedicate iOS to those components that means you're going to have to use a component that has a lot of iOS on it and that probably is going to demand an fpga maybe a large microcontroller maybe a microprocessor unit but that's the only way you're going to get enough of those iOS into your host system processor in order to configure all of those components now when you go to a component like that which has a lot of I/O it's probably going to be on a BGA package and depending on the pitch between the balls on that BGA package you may need to use HDI design techniques let's take another look at this reference design from Texas Instruments and we can see what I'm talking about here so here in this reference design we have this main transceiver in a BGA package and if I just measure the pitch between the pads in this package you can see here that the distance is 65 mm so that's a pretty fine pitch component it's not the most dense component that you'll find in a BGA package but it is pretty fine pitch now that is dense enough to where you will need to use some HDI design techniques in order to complete this design part of the reason you may need to do that is because you are forming co-planner wave guides with multiple feed lines going to all of your antennas what's the best way to form those c-plan or wave guides without taking up all your space for routing on internal layers it's to use blind Vias on the outside layer and you can see that's exactly what they've done along these wave guides going to the RX and TX antennas you see this 1-2 via here that is a blind via going from layer one to Layer Two now they've only used HDI design techniques on this outer layer for this c-plan or wave guide and like I said it's to prevent taking up all of this space in inner layers from routing so you can still route some digital stuff in the inner layers in these regions if you need to if we look elsewhere in the center of this design you can see that the Via population is reasonably sparse and so they've been able to then use through holes in some of the other parts of the package and those through holes are then spanning all the way through the stackup and they aren't spaced so close together that you're going to have problems with drilling now those same considerations can apply to the fpga or the processor that you want to use once the pitch between those balls gets too small you may have no choice but to use blind and buried Vias and that means you're going to have to use thinner laminates on the outer layers of your design make sure to learn more about the standard HDI stackups if this is the case we have a video on that as well make sure to check the link in the description so you can learn more thanks for watching this video everybody make sure to hit that like button hit that subscribe button leave your comments and questions in the comment section and finally don't forget to call your fabricator folks we'll see you next time [Applause]
2024-12-20 08:05
