New Breadboard 8088 PC V2 #9 PC Compatibility, RTC and Interrupt Controllers

welcome to breadboarding in the previous video we got the breadboard PC with the power on self test port working and this is some of the logic analyzer output where we showed the test codes that we sent out starting at FF255 going all the way down to zero this is video nine of the breadboard PC 8088 version 2 in this video we're going to be adding the inruck controllers setting up a BIOS and also installing the real-time clock so in our highle plan the previous step we did was the power on self test port and port B the timer and the speaker so we're able to get the timer to produce beep codes coming out of the speaker and once we've done the interrupt controller real-time clock and BIOS there's only a few more things we need to do to then be able to boot MS DOSs so setting up a keyboard having a video card and the floppy disc controller in the previous video we looked at what makes a micro computer IBM PC compatible the things in green we kind of already taken care of the things in pink or purple are what we're going to be looking at during this video so adding a BIOS which is compatible with the IBM PC software interrupts adding the interrupt controller needed for the keyboard timer we'll also be adding the real-time clock so this has CMOS back memory so the configuration of the PC will be stored in memory rather than in DIP switches and it will also mean that we don't have to keep on typing in the date and time every time we boot up MS DOS this is a chart that we had in the first video in the series which looked at our PCXT hybrid that we're building and where the various parts came from yeah some of these from the original PC and PCXT but the ones we were looking at today the real-time clock and dual interrupt controllers this gives us extra interrupts to allow us to be able to do the mouse and the real-time clock so these came from the PCAT and then we're going to be adding these other items from later series computers in future videos so what is a BIOS well BIOS stands for basic input output system and really the first micro bioses were developed by Gary Kildell around 1975 for one of the early micro operating systems CPM and it isolates the operating system like CPM or MSTOS from the hardware differences and this allowed Gary Kildell and Digital Research to be able to convert CPM to run on different manufacturer hardware platforms quite quickly and easily so BIOS is generally generically known as firmware and this tends to be stored in readonly memory EPROM EPROM electrically erasable pre programmable read only memory or in more modern machines flash memory now the IBM PCXT BIOS supports about 15 software interrupt functions in order to be PC compatible then the BIOS needs to support most of these functions so the Wikipedia article here which the link is there shows the majority of these functions so you'll see that some are relatively straightforward the interrupt 10 is all the video services so you can see there's lots of different functions there low-level disc services which can be used for both floppy disc and hard disk so in order to be PC compatible then the BIOS needs to provide support for the majority of these things not all of them are necessary but certainly the majority are and then there are certain other functions that are added with the PCAT for example the real-time clock functions for example there now the original technical guide that came with the PC PCXT and PCAT the technical reference included the source code for it and this is one of the reasons why the PC I think became such a success although it was an IBM design IBM actually published most of the information you needed to be able to reproduce such a device clone PCs tended to use third party bios generally available from Phoenix and award these are sort of things where you'd have the blue setup screen you may be familiar with on some PCs however the compact portable developed a clean room BIOS so the way how this was done is that the developer never saw the IBM BIOS documentation and a number of other developers developed a specification from that documentation and gave to the BIOS developer so that there was no chance of them actually copying any of the original BIOS code now the BIOS provides the power on self test messages tests all the memory and other devices and will also provide all the boot failure messages and things if it can't find a valid operating system on floppy disc hard disk or other boot devices now we'll be using the XI888 BIOS which has been written by Sergey Kissv along with his XI888 PC designs and the GitHub URL here will be in the description below the video if we just have a quick look at that so the third site has a lot of uh resources a lot of repositories here lots of designs of various ISA bus compatible cards so network cards uh floppy disc controllers all these sorts of things but the BIOS here is really the thing I've been using most and um there's a lot of documentation here i'm just going to cover how to build this and what changes at a high level I've made to get this working with the breadboard PC so we need to download the BIOS what I have got is the original files in one folder and the breadboard PC current version ones in another and I'll go through and compare those in a few minutes we need to create a breadboard PC configuration and its own configuration options we've needed to shuffle the code around a bit so we've actually moved the BIOS up a bit we've moved it up 4K from the initial starting point which was the F80000 which is the bottom of the 32K up from at the top of dress space and that will allow us to put the XTE BIOS for accessing the hard disk in there in future videos we've also configured it to include the nanomp monitor currently on version 7 and this is configured to actually run on reset and is located at FC000000 the nanomp monitor B key will actually boot the BIOS and as far as the BIOS is concerned it will have just started after reset there's some changes needed to make around the video controller configuration to work with VGA output frequencies but we'll be covering that when we do the CGA video controller there were some areas we needed to comment out some of the set lock macros which fix certain functions and things at a hardcoded address so that software that actually called the BIOS functions directly rather than through a software interrupt would still work now that's less of an issue for us because we're not really going to be trying to maintain that level of compatibility we've also modified the floppy disc functions to remove DMA and to use programmed IO but we'll be covering that when we come to the floppy disc controller but I have had to comment out the PS2 keyboard initialization cuz we don't have a PS2 keyboard controller at the moment and at the moment the code does a CPU halt on failure of initializing that so that's needed to be commented out for us to be able to use the BIOS so let's have a look at the changes necessary to get the BIOS working on the breadboard PC we're only showing the things which are different where I've actually made the change now the main file with all the stuff in is the BIOS ASM so I'm just going to go through or cover some of the main changes here it's a few typos and things I've corrected along the way and you'll see here that there's a number of areas where we're outputting a code to the power on self test register and in this particular case I've just added a comment around the DMA the port 80 also happens to be the DMA page register for DMA0 now there are a few corrections as well there were some problems I had in the early stages there needed to be extra if death ends around some of the commands that would cause the BIOS to not assemble under certain configurations then we've got the nanomp monitor included you can see here we're setting the location for that to be C0000 and that's the current version seven of the monitor that we looked at a couple of videos ago then there's a few things there to do with the software interrupt vectors that we just need to configure those so that if we want to use the nanomp monitor for debugging and looking at registers and things like that then those are necessary to allow the non-maskable interrupt to actually go into the nanomp monitor there's a correction there i think the comment in the original code is every 15 milliseconds this is actually every 15 microsconds this clock signal and you'll see here that's where I've commented out the keyboard controller in it because that does a halt under errors this is then some of the code where I've added Red Bull PC specific code to initialize the VGA pallet which is used with the CGI compatible video controller when doing the mouse I needed to include a subbite because some of the mouse drivers were having trouble working and we messed around with the various model information coming out of this particular function and it seemed to be that the Microsoft mouse driver would be happier with a certain PS2 models also change some of the flags there for the mouse support now this change here is necessary to be able to use the XT IDE BIOS so by default it would only search for additional BIOS ROMs up to F8000 but because we were putting the XTE BIOS actually at F800 up to F900 then in fact we needed to extend the scan so it would actually find the XT IDE BIOS and there are various places where we've changed this set lock just means that the code can shuffle up and allows new code to be added in without actually uh causing problems then you'll see that there's quite a lot of uh entries here where when doing the floppy disc initialization and booting from floppy disc there's a lot of power on self test codes that I've added diagnostic information there again we'll cover that in more detail when we do the floppy disc side of things again various diagnostic messages to do with the boot process you can see here that the reset vector would normally jump to the BIOS cold start but in fact what we do in this place is we actually jump to the nanomp monitor and then the nano monitor will use B to effectively jump to cold start so this just means that we can do a bit more diagnostic work so those are the main changes necessary to make to the BIOS itself and then it's necessary to create a breadboard PC configuration so we've got a breadboard PC configuration in this config file and then we've based this these different options and things is a superset really of the XI88 and a couple of other options and things there and I've also changed it to have a one default 1.4 megabyte floppy a drive rather than two i won't go through the changes to the floppy controllers just because there's quite a lot of changes there to do with program IO and we'll cover that when we talk about the floppy disc controller the messages just some changes to do with changing the ROM scan from F80 to F90 you'll see that a lot of these things have only got uh changes to set lock and there's a few other things where for example when we're reading the cos configuration then I added some extra power on self test port messages just so we could read what was coming out of those the printer PS2 orcs we'll cover in later times as will the the time and the video we'll cover uh at later point in time now to build the BIOS we need to go to a command prompt and there's the make process there we just type that you'll see here that where we're padding out the code with the set lock macro is padding out the code so that functions start at a particular address you can see how many bytes are being added here and you can see around where the video is then the number of free bytes is very very small whereas further on down we've got sort of 6 1/2k of space but when I was first doing this I needed to change some of the padding here so it actually work okay and then we will actually have here so you can see here this is the BIOS breadboard PC and you can see that in fact it's not 32K it's actually 28K because the first 4K is reserved for the XD BIOS so I've already programmed that into the EPROM so we don't have to worry about doing that sometimes I forget to do these sorts of things so let's go back to the slides and then we'll look at some of the other things so that really covers what we need to do for the BIOS so all we need to do when the Nano monitor boots up just type B and it will go into the BIOS and what we should hopefully be able to hear is there is a a little tune it does an Intel type CPU tune that BIOS does on powerup so we should actually be able to hear that hopefully so then we're going to be looking at adding the realtime clock and the CMOS setup so the PCAT which was the 286 version of the PC introduced real-time clock so that meant you didn't have to enter the date and time on each DOSs reboot anyone who's ever used the original PC it was a real pain to have to keep on typing in the date and time each time and if you didn't do it you'd end up with all the date time stamps on your floppy discs would all be based on sort of 1980 which really wasn't very helpful there's a battery back cos memory that allowed the configuration to be stored and it has a check sum as well so if anything gets corrupted then you'll get a bad CMOS check sum and this meant there were no DIP switches the PC PCXT had various switches on the motherboard that you needed to configure the memory and various other options there's a BIOS setup utility to maintain those settings so the PCAT had a diagnostics floppy disc setup option and the XI888 has a built-in setup screen a bit like the award and Phoenix biases and more modern biases we'd be aware of and the following slides actually come from PCJS where actually has a PCAT and if you load the PCAT diagnostics too then this is where some of these screenshots have come from so what you had to do it wasn't built in obviously like you know pressing F1 or F2 or something like that during power up you actually had to boot off the diagnostics disc allow you then to run setup enter the current time and date press yes then would review what the current configuration options are and you could then actually go in and modify that the number of disc drives what the parameters for the fixed disc was and all those sorts of things so we'll be looking at that in future videos at the moment we're not going to be able to look at the BIOS output messages because at the moment we don't have a video controller i'll be looking into that in future videos when we add the CGA card so the PC80 and the compact deskpro 386 use this particular real-time clock chip had a 5 microcond cycle time so you needed to access it sort of fairly slowly now modern real-time clock chips are register compatible and we'll be using the Dallas Semiconductor DS12885 and that's the same one as is used on the XI888 now the CMOS and the clock battery are backed up via a sort of 3V button cell which will actually put on the breadboard now the interrupt controller requires an interrupt line to be active high whereas the output from the real-time clock is active low so we do need to invert the interrupt output and and one of the PLLDS we looked at last time the readyweight speaker PL includes the invert for the interrupt date for the real-time clock and because this is interrupt 8 it does require the second interrupt controller we use the IO port range 70 and 71 and one of the things to note on the diagrams I will show that the chip select was actually an inverted value of the power good that came out the power supply this was actually to make sure that the real-time clock can be updated until the power supply was in a good stable situation so you didn't get corruption so this is the original PCAT circuit diagram and you'll see here that the power good coming in here goes through these inverters to actually provide the chip enable so this is how PCAT prevented the configuration of the CMOS here getting during power up activity then this is the compact deskpro 386 again quite a complicated circuit here because of the oscillators and the various power input in fact the chip we're using does all of this stuff effectively on the chip so it makes things a lot simpler and you'll see there that the output for the interrupt there has an inverter there to go to IRQ8 and then this is the output from the XI888C schematic so you'll see here that the oscillator is connected directly to the real-time clock chip there's a battery backup there and there's also a link there to clear the cos so when the power is off and it's running off the battery if we ground that input then it will set all of the internal CMOS configuration except for the date and time will be set to ones now there's three inputs here for controlling the reading writing and the address enable here so those three lines are already available on our IO decoder PL that we installed last time now one of the issues that I covered at the end of the first breadboard PC series was that the real-time clock seems to run fast when the PC is powered on and when I actually looked at the clock input so the X1 X2 clock inputs there when the power is off and it's running off the battery then the input there is actually quite nice and and sine wave like however when the power is on then there seem to be a lot of interference from the data bus and if you see here the D0 data bus line here is very close to the input pins and because this was connected directly to the main data bus then it was never very quiet now what we're going to be doing is also plugging in a system bus birectional buffer so it'll actually isolate the system data bus from the main system bus unless one of the chips actually behind it is being addressed so this should hopefully resolve that if that doesn't address it and we'll keep an eye on this when we first start up MS DOS and see how accurate the clock is then one of the options we could do if we've got MS DOSs running we could just bend these two pins out of the breadboard and actually solder the crystal directly to them and then perhaps put some shielding around it should it still be an issue we're not going to be able to really test that out until we've got the video output from the BIOS and we're able to actually use the keyboard to set up the date and time we'll look at the configuration for the in truck controllers on the main keycad schematic in a minute but there just one thing we need to be aware of this is the diagram from the original PCXT this only had one inrupt controller but there was a particular issue that I came across in the first series the breadboard PC in that the interrupt acknowledge output from the CPU or the bus controller in fact here in our case we're actually getting that directly out of the CPU it did require a pull-up resistor here you can see there's a pull-up resistor there and I did need to add that in so I have made sure I've added that into our Keycad schematic and if we look at the XI888 schematic then the interrupt controllers down here so this is actually using the PCAT style where it had two interrupt controllers and we'll have a look at the configuration there in a minute in the keycad diagram you'll see here the two intake values there and the there is a pullup resistor for intake there as well so the XI88 included this we just need to make sure we include that on the keypad diagram so let's take a look at the kecad diagram and see what we're actually going to be adding during this video so last time we added the speaker timer the IO decoder the power and self test port the port B read and write and in this video what we're going to be doing is adding the realtime clock here with the crystal and the backup battery and our CMOS clear jumper setting there we're also going to be adding the system data bus buffer here so all of the data bus on this side of the circuit so you'll see the in truck controllers and all these other devices over here are all actually running off this data bus so it's isolated from the main data bus here and the problem I was talking about with the realtime clock being uh running fast is that this this value here will only be connected to the main data bus when the CPU is wanting to talk to one of these devices here so really it should be a lot quieter and hopefully this will avoid the interference the occasional times we do access it I don't think it's going to cause too much trouble and obviously if if it does then we've got that option of perhaps bending the pins there so this system data bus buffer is a birectional buffer 74 LS ALS 245 and this is driven by the cy buffer chip enable as you'll see here the cybuff chip enable comes out of here and basically what this does is this will enable this if any of these outputs here on this side over here are being accessed either red or right then this will be enabled and you'll also see that the direction so by default the direction going from A to B is when the CPU is writing data to the chips over here and it's B to A when it's reading so this is data transmit receive and if we look at this signal here this actually is also the same one that actually drives this main data bus buffer here you'll see here that DT / R and we can see that DT/R actually comes straight out of our 8088 CPU and it's also available actually on the bus through this buffer here so all we should need to do is to hook that into there and hook the cisbuff CE and then this datab bus buffer should be okay and previously I think we'd wired in our main datab bus into one of these chips over here cuz it wouldn't quite reach the timer what we're going to be doing is changing that cable to here and then this cable will probably go over to the timer and that will hopefully sort ourselves out then we're also going to be installing the interrupt controllers so there's two interrupt controllers number one and number two they're configured very similarly you'll just notice that we've got the programmable interrupt controller one and programmable intront controller 2 we got the data bus IO read IO write these cascade 0 one and two this is related to how the interrupts can cascade from one controller to the other to give us our sort of zero to 15 interrupts there's a pull up on this one this is in the legacy terminology of master slave so the master is controller one and the slave is configured by SP being zero you see here that we got interrupt 8 up to 15 but when this when an interrupt occurs from this controller what in actual fact happens is the interrupt output here is going into IRQ2 on the first interrupt controller so in fact IRQ2 is in fact kind of like the chained interrupt for the other controller and you also see that there's this int acknowledge signal that comes in again this is coming from the CPU itself and what happens is when there's an interrupt flag by the interrupt controller the CPU will then send out two low signals on here and on the second low signal what the interrupt controller will do is actually provide a bite value which is effectively the interrupt vector for the interrupt that has been triggered and that will actually be an offset to the interrupt vectors in the first sort of 1k of RAM on the PC and when we're testing this what we'll be looking at is once we got the BIOS running then there is a system timer that runs at I think I think 18 hertz for 18 times a second and each time the system timer runs then what will happen on IRQ0 here will trigger this interrupt and what we should be able to see is 18 times a second and we should be able to see the interrupt being triggered the int being raised by this and then the int coming back from the CPU and we should be able to see the appropriate bite being put on the data bus here by the interrupt controller we might just need to make sure that the rules here for the CIS datab bus buffer are actually also enabled such that when intake is low then we also need this buffer to be able to actually allow the data to come out so that might be something that we haven't actually included at this point in time so I might need to go and check that the real-time clock is going to be plugged into the PLLD down here that we did last time and then we've got the read and the right signals coming out here we also need to hook in the reset but pretty much other than this sort of uh inverted interrupt we've got pretty much everything that we need set up for this so it should just be a matter of wiring this in so let's take a look at the breadboards and actually see where we're going to be plugging everything in so this is the board we were working on in the last video and the data bus buffer is actually coming in on this wire this is cuz it wouldn't quite reach up to this one over here so this is just going to come out of here and go in here and then we'll be hooking this one over here to here and it will then go to these other ones there so realtime clock chips so I've got the chip label there ready to stick on the chip and we'll also be putting the backup battery in here as well this is the 74 LS or ALS 245 birectional buffer and our two 82C59A intercil controllers these are modern chips so these were bought from Mouser in the last couple of months these are still available unlike in the previous video series I was trying to use original 1980s parts where possible these are still available and they should be a little bit faster and shouldn't be susceptible to problems with clock speed so I'm going to do now is to put the labels on the chips plug the chips in and we'll wire everything up going back to the schematic as we go and then when we come back hopefully we'll be in a position to power this on and see if we can get anything coming out of the power on self test codes from the logic analyzer here that's connected to the post port down here and we should also be able to hear some of the sort of beep tones as the BIOS actually powers up so just going to put in the backup battery connector in there put in the real-time clock i'm going to move that power connector over the other side just wiring in the ground and 5 vols lines and wire in the backup battery there and the jumper is for the clearing the CMOS memory so just checking those off there now we're going to be doing the Motorola Intel by the ground and the crystal it's in Intel mode and we've got the 32 kHz crystal just going to wire in the data bus there and then we're going to put in the system datab bus buffer and just wire in the various data lines there just need to put in the power rails for that and the system buffer enable from our IO decoder and then the and the DTR from the main bus okay okay so now we just need to do the write enable read enable and the address enable for the real-time clock plus the reset plus we're going to wiring in the interrupt lines that's the reset just going into one of the other reset lines there this will now be the read enable the right enable and the address strobe as well that is just the interrupt going up to the PLLD there to get inverted and the tie up to 5 volts there so now we're going to do the two interrupt controllers we need to do the chip enables first and the IO read and IO right and then the cast zero to cast two at later point of time so I'll just put those in give more holes at the top there okay so you're going to do the power rails first of all and the tie to ground so the controller one that's tied to 5 volts secondary controller is tied to ground putting in the power rails and the tie to ground and tied to 5 volts so now we need to put in the chip enables for the intro controller one and in controller two with the IO read and IO right so bringing in the chip enables first then IO read and I write just on the left hand side there and we can just bridge those across so now we need to take the interrupt out of controller 2 and feed that into IRQ2 then also feed in IRQ0 and IRQ8 into the interrupt lines there so that's IRQ2 and a int and then we've got the other two interrupts there as well now we need to feed the interrupt and knowledge over to the PLLD there and into the main bus that is intake over to the PLLD tie the two chips together and then we're just going to wire the interrupt and the in knowledge to the main bus there now we just need the cast zero to cast one so this does the cascade of the intro controllers the two can [Music] coordinate we're just going to do the data bus now to hook the data bus into the system buffer there for the two in controllers just putting in the decoupling capacitors as well now I just need to put in the A Z line so this allows us to select between two addresses for the Okay so we've got everything plugged in i had forgotten to do the address line so we just snuck those in at the end there so I've got some of the logic analyzer signals connected up there so we'll have a look at that in a minute but first of all I did mention about the interrupt hook knowledge and whether or not we might need to make some changes and in fact I did need to make some changes so this is the original PCXT diagram and what this shows is that interrupt acknowledge down here if we just zoom in so interrupt acknowledge actually goes into some gates here that actually control the direction or the buffer for the Xbus data the XD data so this is the original PC so there's definitely something to do with the direction so we could read the bite that's put on the data bus by the interrupt controllers when the CPU is acknowledging an interrupt and if you look at on the right hand side here this is from the XI888 and in fact the input to the direction on this buffer the X bus buffer here you can see that we've actually got the interrupt acknowledge the IO read and also in fact the A8 and A9 and what that is because is because of all of the devices on this all the IO devices on the Xbus here are all actually in the 000 range for the IO range and that's the same as the signal that we've got for our buffered in the U the logic that we're doing at the moment so looks like it is something that we need to worry about we have added the interrupted knowledge is now going into a spare pin on our IO port decoder and what I've done is I've modified the rules here such that the SIS buffer chip enable now actually has the necessary logic conditions to include this this is version two of our IO decoder and you'll see I've added the interrupt acknowledge there again we've got the negative polarity for this and then all I've needed to do now is to include a condition for our CIS buffer chip enable now actually includes the inrupt acknowledge as well the chip labels have been updated and I programmed that and so it's all installed and working now in order to test this since we've already configured the BIOS then this is a slide that I did in the previous series that just showed the sort of order in which things happen in the BIOS startup sequence certainly with the XI88 BIOS now I'm not expecting it to go all the way through here but we should be able to see that the codes that the BIOS gets through will go a certain amount of the way here and hopefully we'll hear the sort of Intel little tune at the BIOS power up and that will actually give us an indication that at least the BIOS is operational so for testing the intro controllers what we're going to do first of all is the first part of the test is going to be the power up sound because this uses the programmable interval timer and also what will then happen is that there is a system timer on the PC which one of the channels for the programmable interval timer is connected to IRQ0 and that generates an interrupt about every 55 millisecond about uh 18 times a second and that's actually used for a number of things including updating the system clock when it didn't have a realtime clock so if we hear the power on noise the Intel's tune then that indicates that at least the timer is working and I will also do is I'll run the test program that we did in the previous video just to make sure that's working and that we're getting power on self test codes coming out on the logic analyzer so then to check that the programmable interrupt controllers are working we're going to be checking on the IRQ0 system timer interrupt that occurs about every 55 milliseconds and this was originally used to update the clock information running in DOSs before it had a realtime clock in the PCAT and after each interrupt what we should get is two interrupt acknowledges and the pick is then going to need to put the information to do with the interrupt number on the data bus so the pick one interrupt vector that interrupt zero should have is 08 and that is actually part of the initialization and our pick two has an offset of 70 so all of the higher interrups actually start at 70 so what should happen is when we get IRQ0 we should actually see 08 being written to the data bus on the second interrupt acknowledge then after that we should also see end of interrupt which should be written to both pick one and pick two and that should be two 0 which basically tells the interrupt controller we've finished actually the interrupt so if we see those things then we know that the intro controller is pretty much working okay okay so first of all let's do the test that we did in the previous video so this is ouron self test test and the beep test so I'm just going to put it in load send that's finished so now what we're going to do is to just check for the logic analyzer is hooked up looking at the power on self test port and I've also changed some of the settings here we've now actually got the CIS buffer chip enable and the DTR as well and out two is the output of the timer to the speaker so if we're getting a beep then this should actually show here so I'm just going to run that up i've got the post test on the display just going to press enter getting a beep now stopped and then we've got the registers okay so what we can see over on the right hand side here we've got our power on self test code so it starts at FF and works its way all the way down to 01 that looks like we're getting our power on self test codes and if we just drill in at the beginning here we can see this is where the power on self test codes are going and then if we drill a little bit further out we'll see that at some point in time we should get the tones so this is where we're actually getting the speaker output and if we look up the top right hand side here see this is 400 htz so this indicates that our changes with the system buffer and the DTR appears to be working and we can sort of see here that the when we're writing to the timer then we're also getting the CIS buffer and the DTR is looking correct so I'm going to turn the computer off and back on again just cuz we want to do a cold start we're now going to run up the BIOS i'm just going to press B for BIOS on the keypad we should see this start to collect data once we get host codes being written by the BIOS i'm just going to press the BIOS now okay so we can see the power on self test codes here it started at 75 just cuz that was a random data at AON we can see that we had 01 02 03 all the way down 3 0 and it isn't continuous there are the odd sort of jump here so if we have a look at the error numbers in the bio source code we can see that in fact we've got the initial 01 is start of power on self test and we can see that we've got the pick initialization video bios scan CPU detect and in fact 30 is start of RAM test so we've only got 30 it hasn't g further we haven't got any higher ones but we can see certainly that it is actually going through the initial stages of the BIOS and we also heard the Intel sort of tune at the power up as well so that meant that the initial sort of testing of the interval timer was working okay so now we just need to change the logic analyzer so we can actually look at the system timer interrupt zero and also look at the interrupt acknowledge case so I've put the extra logic analyzer signals on the various interrupt related signals we talked about i've moved the data connection here off of the power on self test port on the other side so it'll only show us the system data bus so it'll show all the output from the interrupt controllers and also the inputs into the power on self test what I have done in the analyze of power on self test by adding the post chip select on there we can then filter this on everything beginning with 0x0 and it'll only show us the power on self test codes just going to power on the PC again so that we've got cold start and just going to press B for BIOS so if we zoom out just have a look at what's going on here so what we can see here is IRQ0 the system timer and if we have a look at the top right hand side here the frequency so this is 18.2 hertz about every 54.93 millisecond

about every 55 milliseconds now we can also see if we filter over here the power on self test codes here so we can see all these codes and what we would expect is that until such time as the interrupt controllers have been enabled and initialized then we wouldn't actually expect to see any activity so you can see that the timer starts to generate interrupts sort of uh after what about 400 450 milliseconds here but in fact the first interrupt doesn't actually occur until sometime a bit later and the reason for that is that it's only when we've had done the necessary enabling in the BIOS for the interrupt controllers that we actually see something going on here so let's dive in and have a look at what's going on so what we can see here is we have got the IRQ0 as generating the interrupts here but the first interrupt we actually have we can see down here occurring around here so if we just add some timing markers just so we can find it again so the interrupt zero occurs at this time and very soon after we get an interrupt to the CPU and what we can see here this is the interrupt acknowledge so on the second interrupt acknowledge then we should expect to see the code from the interrupt controller 08 and if we go to the top here and if we ignore the fact that we've got the one in front of there because we got the power on self test chip select there then we can see that we've actually got 08 there so that appears to be working although we're not actually seeing subsequent interrupts going further on there so it's not seeing subsequent interrupts we'll just have a look that we then expect to see that there will be a write to the interrupt controller and we'd expect to see the the end of interrupt to be written to the interrupt controller so we can see here we've got a write and if we just look at the value that we've got here and we can see that in fact 20 is being written to the interrupt controller so that is the end of interrupt it certainly finished one cycle so that appears that the wiring is all set up but we're only getting as far as power on self test code 30 at the moment which is start of the RAM test so there's probably a little bit more we need to look at here but what we can be pretty sure here is that we have actually got the interrupt controller appears to be working and we've got the interaction between the CPU and the interrupt controller seems to be working okay here we've now completed a number of the parts that we need to make a micro IBM PC compatible we're not going to be bothering with the DMA and the next major step we need to do is a PC compatible keyboard and we will also need some sort of video controller as well so we can see something on the screen so we've completed the interrupt controllers and our real-time clock we can't really test the real-time clock until we've actually got something on screen so in the next video we're going to be looking at the PS2 keyboard controller and one of the commenters did suggest perhaps I could try and get the BIOS to send output to the serial port so I'm going to be looking at that so the CGA video controller is the next step after the keyboard but that's going to take quite a while so if I can get the BIOS writing to the serial port then we might actually be able to get some information out of the BIOS before we create the video controller i'm going to break the video there if you don't want to miss out on future videos then please hit subscribe and if you found the content interesting please hit like it just helps to make the videos available to more people thanks for watching

2025-04-17 09:26

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