New Breadboard 8088 PC V2 #8 PC Compatibility, POST Port and Speaker

welcome to breadboarding in the previous video we managed to get our modern surface mount serial controller UART chip working on a 48 pin DIP connector here that we made we managed to download programs into the computer memory using the S-record format now this is video 8 in the breadboard 8088 PC version 2 and in this video we're going to be looking at adding the power on self test and timer and we'll be looking a bit about what makes a computer IBM PC compatible so here's our plan we've completed the basic nano comp so this is a simple computer based on the AT88 processor with an LED display keypad and a serial port to allow us to upload and download program files to the system and in order to make a basic floppy disc PC we need to carry out these steps so we're going to start with the power on self test port and port B as it's known which I'll explain about in a minute the timer and the speaker so we can get beep codes and we can get feedback actually from sound and then as we go through the next couple of videos we'll be adding the intro controllers real-time clock PS2 keyboard controller we'll then actually try and get Sergey Kissv 6 i888 BIOS up and running and see what sort of messages we can get from that we're then going to spend quite a bit of time looking at then building a CGA compatible video controller going to start initially with text mode then we're going to add the floppy disc controller and see if we can boot MS DOS from floppy disc so in the first video I covered in summary what we were building this is really a PCXT hybrid and this uses where possible fairly modern components rather than using legacy 40-year-old components so we're going to be trying to use MS DOS 330 and early versions of Windows as I said we'll be building out the CGA graphics controller in uh later in the series what we've done already is in green here so we've got our clock CPU bus controller and some of our bus signals and we also got the serial port running this was the 16550 compatible serial port and we're also going to be adding the power on self test port as well now power on self test which I'll talk about for a few minutes now the original PC and PCXT didn't actually have a power on self test port but the PCAT did actually introduce a basic level of this and it included a couple of outputs from the BIOS as the system was booting up but over time the BIOSes would actually output quite a few diagnostic codes they weren't really error codes they're really sort of a status code to see how far in the bootup process that the BIOS has got -0°.net net has a section on ISA postcards and you can see that the original PC didn't support power and self test codes later PCs did and a sort of a power on self test card this is an example of a more modern one that you can still buy today and it has not only the original ISA bus but also PCI bus here as well i'll generally show the last power on self test code before the computer halted and this is a vintage card as well and again not really error codes it's just really a status of how far things have got and one of the things you'll notice is that the port number used for power on self test does vary by different PCs so generally port 80 is what's used by standard and certainly Sergey Kizlev's design use port 80 you can see that PS2 use port 90 and micro channel bus PC such as the later models of PS2 use the higher ports but we'll be using port 80 and all that happens is in the BIOS there will be a code written to port 80 and if we have the appropriate device attached to that so I'll be using a logic analyzer we should be able to actually see the code and it's quite useful for producing diagnostic information certainly with a floppy disc controller I was outputting all sorts of information to the power on self test port to be able to provide diagnostic information let's have a look at the block diagram and just work our way through the bits that we've already done so we've got our ATC 8088 processor this is a modern processor which can still be purchased today i think it's about £40 from Mouser we're running this both with the original default clock on the PCXT but also a faster turbo clock and we will need that when we want to use the floppy disc controller particularly if we're not using direct memory access we've added our buffers latches and bus controller address decoding we've got our readon memory which is currently running the nanomp monitor that runs the display and keypad we've got actually 640k of RAM we've also added something which wasn't in the original kit PC this is the keypad and seven segment port which we then used for driving a seven segment display and the keypad and then we added the serial port now only really the seven segment display port and the keypad here is not PC compatible so these weren't really on the original PC platform we've just added these give us some sort of debug support as we're developing the computer the rest of all these things though are actually IBM PC compatible so what actually makes a computer IBM PC compatible so we obviously need to be using an Intel 8086 or 8088 compatible instruction set so we're using the 8088 we need to have a BIOS which is compatible with the IBM PC software interrupts so this is the way how DOSS interacts with the BIOS generally through software interrupts there are certain devices that the PC expects to have so things like the timer the parallel peripheral interface port B and speakers particularly for the power on self test beep code so if there's a fault with the memory for example then you might get some beep codes we need to make sure that the IO ports and interrupts are similar to the PC or at least the BIOS is configured if there are any differences we're likely to want to have some PC ISA type expansion bus or at least make sure the signals that we've got on our bus are PC compatible we need to add in truck controllers and that certainly was needed for the keyboard timer serial port and mouse and in the early days it was also necessary for the floppy disc controller i'll be talking that in a second we need a PC compatible keyboard particularly all the scan codes and things like that that the keyboard returns needs to be PC compatible now in the original PCs there was something called direct memory access and direct memory access controller and this would kind of offload some of the data transfer from the CPU for dealing with things like floppy disc controllers now the Tandandy 1000 PC Junior didn't include DMA and in fact in the breadboard PC version one I had a lot of trouble getting the DMA working reliably and so I worked out a way how to avoid using DMA and used programmed IO for accessing the floppy disc controller so in fact in the version two of this breadboard PC we're not going to be using DMA that will simplify things quite a bit now the reason why I think the IBM PC was so successful is because IBM published a huge amount of information about the PC in the technical reference guide and you can see this one's what's some 628 pages long and not only did it include all the technical details it included the schematic diagrams and even the full listing of the BIOS so we can see here full BIOS listing probably runs to about 70 or 80 pages and also the logic diagrams now some of the other diagrams at the beginning are useful just for sort of getting a feel for the overall scope of the system so this system block diagram I'll be going into in a minute and then there are also a more detailed sort of system board diagram as well which we'll be going to and then when we get to the towards the bottom we then got all the logic diagrams which again I have got copies of these in the slides here but I'm not going to be going into in-depth discussion of them because I kind of did that in the previous series you'll see here you've got the main system board with the processor and mathco processor and the various sort of uh timing and DMA RAM board additional RAM parity generation expansion RAM the timer and speaker output the parallel port and keyboard interface and the bus connectors so all these are are in there i'll include the link for the technical reference guide in the description below if you want to have a look at that and see where you can go for this for the definitive information on it let's go through and have a look at these diagrams so all I've done on the block diagram here is highlighted the bits that we're going to be looking at and all we've already done so things like the processor speaker keyboard read only memory we're not going to be bothering with a monochrome display adapter this time round we're just going to jump straight to the CGA color graphics adapter we've already done the communications port and we will be looking at adding a fixed disc drive and adapter but we're not going to be worrying with some of these other things some things like light pens and printers and all that sort of stuff then this diagram is probably over complicated for purposes here but the main thing really here is a lot of the complication here was caused by DMA the DMA controller and the separate bus that it had known as the X A and XD bus and we largely avoid all of that by removing DMA and as long as we include enough uh buffering on the data bus then hopefully uh we won't really need complexity that we have here the main differences we got really are that in addition to the standard 14.3 MHz clock that the original PCPXT had we're also going to have this faster 25 MHz clock which happens to also be the VGA dotplot frequency and that should mean that we can actually run the processor fast enough such as we can talk to the floppy disc controller using programmed IO rather than needing to use DMA we're also going to be expanding the number of interrupts that we support so the original PC only supported eight interrupts we need to have the 8 to 15 to be able to do things like the mouse and other adapters and things and you'll see there's quite a few things which are we don't need to worry about in this scope and then as far as all of these diagrams so you'll see that uh I've annotated all of these so the main system board this is the processor but we're not using the maths co-processor got all the buffering here then a lot of the control logic we don't need to worry about a lot of this was related to DMA we're just really going to do a bit to do with some of the weight states and things so the ready weight in particular is used to extend some of the bus cycles for slower IO devices we need a bit of IO decoding and memory decoding we don't need to worry about the DMA controller at all so we remove all of that this is the ROM although we don't need to worry about additional buffers and things for the ROM we can just put that we've already installed that and got that running a lot of the complexity around running dynamic RAM and refreshing dynamic RAM and checking par we don't need to worry about either and the RAM expansion because we've got two chips containing up to 1 megabyte of RAM we really don't need to worry about this complexity then we have the system timer so this is the programmable timer and we will be making use of this although some of the circuits we'll be making use of comes from the XI888 so in particular the speaker output circuit we'll be borrowing from Sergey's design and we'll also be adding a realtime clock as well now the real-time clock only really got added from the PCAT onwards but we will be adding one of these in a couple of videos time so then this is probably the one which is of most interest within this video so the original IBM PC and PCXT included this 8255 parallel port interface now this actually included three ports known as port A port B and port C now port A was primarily used to access the keyboard and was used for the keyboard controller now because we're going to be using a PS2 keyboard there's a dedicated controller for that so we don't need to worry about that port C was primarily used for the configuration switches which were how you would configure the memory banks and various other options within the original PC and PC XT but because we're using real-time clock with some CMOS back memory the XI888 BIOS allows us to do the configuration in CMOS memory and so we don't need to worry about these either so in fact there's only a handful of the lines actually on port B which are used and we'll be looking at the XI888 information on this really rather than this because you can see so much over here is actually in red and unnecessary there are a few items and things here but we'll be focusing more on the XI888 information for that and then finally the bus signals so those are the original IBM XT designs and the majority of it is actually being used to base the original version one of the breadboard PC but there are some changes from that to simplify things running on breadboards and to remove some of the problems that I had with DMA so the XI888 design from Sergey Kisslev I'll include the GitHub reference in the description below so this is the top level diagram and really the bits in purple are the things that we're going to be working on so you'll see this is the port B timer realtime clock keyboard controller some of the logic for the input output chip select but we won't be including the DMA related information and I sometimes will refer to the keycad schematic diagram here as I'm going through things where I'm trying to actually clarify things so there are a few things that I called out here there are some specifics to do with the original PC had special handling of slot 8 expansion slot we're not going to worry about that adds complexity that we don't really need to worry about so because we've removed DMA we don't really need to worry about the X bus as it was known so the XD and the XA address lines and things now parallel port A conflicts in fact with the PS2 keyboard controller but we don't need port A and so that's not really an issue we do need the parallel port interface port B on port 61 that is required and is in the XI888 design one thing we need to be aware of is that the PS2 keyboard controller the A0 address line on it in fact connects to the A2 address line so in fact the keyboard controller ports are 6 and 64 so that's just something when you're hooking these up you need to be aware that you don't want to connect the keyboard controller A Z line to A Z you need to connect it to the A2 address line i've consolidated the IO ports and interrupt mappings and you can see a lot of the information here the GitHub site for Sergey which includes the BIOS and the XI88 schematics so I've summarized the interrupts and the IO ports that we're using and highlighted those ones in green where we are going to be using them and the ones in red where we don't have to worry about it originally in the IBM PC the non-maskable interrupt was actually used for memory par and also sometimes for some of the par checking to IO devices so we're not going to use the parity in this design and we in fact use it for the nanomp monitor abort key allows us to jump into the monitor and inspect memory we're not going to be using the second serial port and the parallel ports either we will be using the realtime clock mouse and hard disk interrupts here and you'll see also the timer keyboard i also see that interrupt 2 is actual fact the cascade for interrupt controller two so in fact when we've got the 15 interrupts here with two interrupt controllers the original PC only had one interrupt controller so do 0 to 7 but in fact in order to cascade the two interrupt controllers then interrupt 2 is in fact used for the interrupts being generated from the second controller and down on the IO ports uh you'll see we're no longer using our original Motorola 6850 serial controller we've replaced that with our serial port here in the previous video and although we've still got the port assigned here for our LED display and keypad and then all the other ones here the main gaps really being we no longer got the DMA controller DMA page register and we'll be using the XT IDE hard disk controller and BIOS later and that uses this port range is the default for that rather than the original IBM PC did use a slightly lower range for that let's take a look at the Keycad schematic to see what bits we're going to be adding here okay so this is our top level diagram i will publish these on GitHub i just got a few changes to do to the CG video controller uh before I publish it just cuz there are some things that need to be changed most of the bits around here and here are pretty good now there are not many changes to make here so in the previous video we added the serial controller here and the USB to PC serial port and where we're going to be looking during this video is at the top right hand corner here so we've got our CPU here and the clock controller and bus controller here we've already added the main address decoder but what we're going to be adding during this video is the power on self test port our port B which has two chips one for reading and one for writing we won't be doing the real-time clock for the moment we're going to need to add an IO port decoder so this breaks out the lower eight address lines into the appropriate signals for controlling these various chips around here we're going to be adding the programmable interval timer and there's also a chip here which is a programmable logic device which we will be using for providing the speaker output and some of the gate consolidation that's necessary for that and it will also be used to generate some of the ready weight signals needed sometimes for weight states if we were dealing with slower IO devices now for the moment I'm not going to plug in the system data bus buffer here we're going to be doing that when I do the interrupt controllers so for the moment I'm just going to be connecting these chips directly into the data bus we will then change that in subsequent videos when we put in the interrupt controllers and our data buffer here I did have some problems at the later stages of the project when I'd added a lot of extra items onto the original breadboard PC particularly I had the CGA and MDA video cards which were actually using quite a lot of the datab bus capacity so I want to add more buffers in this version so that hopefully things will be a bit more reliable when the design has actually got a lot larger so I've got two PLLDs here so we've got the IO decoder PLLD and the speaker timer and weight states PLLD i have already gone through and done the rules for that sometimes I forget to do this so I'll just highlight the the rules here so basically these are all the chip select outputs for the various in truck controllers timers the real-time clock port B power on self test port and also that uh data buffer that we've got there and then similar to the earlier videos I've done I'm now using this field syntax for the address and this means that all we need to do is to refer to our IOXX range input so this is a an input that we've got from a main decoder that tells us when we've got an address in the lower IO port address range 000 xx range really there and you can see here that these are the addresses for the various things which were in the diagram that I showed in the slide earlier and this actually then just generates all of the necessary conditions with those address lines to satisfy those rules and if we actually compile this open in winup we need to open an existing one like this first turn off the project view and then when we run it compile that's been successful we have a look at the documentation file i'd always recommend you look at the documentation file i neglected to do this a couple of videos ago and I realized I'd made a mistake you'll see that those rules with the field syntax have now expanded to all these A0 to A7 values so it makes the specification of these very much easier and we'll just check that all the PIN assignments are correct apart from the address field everything else should have a PIN assigned this indicates if we made a spelling mistake for example if we had something zero here now if we go all the way down to the bottom and we have a Now in fact you wouldn't expect us to have that on pin one in fact let's just check against the schematic so in fact pin one should be not connected we're not using it for anything whereas at the moment we have actually got pin one is uh legacy from the first version so we're just going to remove that save it this is why it's so useful to look at the documentation file just little things like this might cause problems at a later point in time we turn this off and recompile it again now when we have a look hopefully yes we've got rid of that now so we've got our IO read IO write all the address lines in there this other input here for our 00 port range then these are all the outputs that's okay and then the other PLLD we've got here this is actually got a couple of uh complicated functions on here and I'm actually using an ATF 750C because we actually need this to have more than one clock signal to drive the flip-flops in here and so what I've done similar to earlier on in the video I've actually got where the PL rules are quite complicated I've actually got the schematic for this is highlighted here so there there are several aspects of this there's bits of the speaker output circuit you'll see here that the there's a speaker output from port B and also output two from the timer and that produces a speaker out which goes off to the speaker circuit there's also a toggle for the dynamic RAM refresh timer so the original PC had a timer for refreshing the dynamic RAM but that can still be used and is used by the XI88 BIOS for doing timings and so what this does is effectively toggles the dynamic RAM refresh timer on this pin and this could be checked on port B and then this circuit here is uh relatively complicated if we have a look at the XI888 design this is the bus arbitration and weight logic so not only the weight logic but also the DMA logic in here and I covered this in quite a lot of detail in the previous series but in fact the only bit where you need to worry about is this bit for the weight states for the IO ports and so what I've done here so basically just got the whenever there's an IO read or an IO write going on this actually will generate a weight state so this extends the IO access by an extra clock cycle and this other flip-flop in here basically delays the reset this flip-flop by one clock cycle so what this effectively does is adds an extra delay one clock cycle to IO reads and writes so these rules have been encoded into the PLLD so we got our inputs on here and there's also the real-time clock as an active low interrupt which needs to be active high so we actually invert the real-time clock signal out here but we main things really got the speaker out going to the speaker circuit to the loudspeaker we've got our ready weight output which goes down to our clock controller clock generator and will pause the CPU if it need if it needs extra time the refresh debt signal here is used by the BIOS actually to check up on the refresh timings and it's used that for certain delays if you want to make a more accurate delay linked to that timer and because this is a 750C it means that we've actually got more options to us we we can have a separate clock for each flip-flop and you'll see here that the ref debt for example is using the out one from the timer it has a dedicated reset and in fact the diagram here shows that the input the D input is actually coming from the inverted output and so the Dinput is actually coming from the inverted output then I've generated this combination between the IO read and IO right this is effectively the NAND of the IO read and IO write so this is this gate here this input generates a clock now there is a limitation of the 750C is that we can't include sort of logic terms for the input clock we kind of need to consolidate these together as an output pin even though we're not directly using the output pin then feed into the clock here so this is the main ready weight output so the ready weight output is just connected directly to the pin but this is the second flip-flop that's actually clocked off the main CPU clock the input to it is actually coming from the output of the previous one above we don't have any preset values but the reset for this one is actually coming from the reset signal itself whereas the reset input to this one is in fact the inverted ready weight one from here and if we go back to the diagram here you'll see that in fact the output here the output of the delayed by one is going into the reset here and the output of the ready weight one is going into the D here so by putting these diagrams in here just makes the logic rules a bit easier to get right so hopefully I've got those right and if we just compile this one compilation successful we'll just open that one documentation file for that one if we look at all the sections here we can see that in fact our ready weight in fact is using a pin node so it's not directly assigned to a pin it's kind of an internal thing and if we look at the documentation so what we can see actually in the 750C documentation is we're actually making use of one of these second flip-flops here in fact for our delayed ready weight by one so we're making use of one of these which requires us to define this pin node which I covered in the PLLD series so I include a link to the PLLD series uh which I covered some of the more complicated aspects of this including how to use all of these pin node extensions and things these more complicated 750C PLLDs one thing to note is you do need the more advanced programmer to program the 750C you're not going to be able to use a basic Epron programmer for programming these chips unfortunately so I've already laid out the boards for these so when we did the CPU we actually laid out these sort of four breadboards already so all I need to do now is to we'll go off and we'll lay the chips out here we'll start to wire all these up and when we come back we're going to have a look at the bit of the test software so I'm going to do test to output the power on self test port and we will also do a simple test to make sure we can get a diagnostic tone out of the timer through to the speaker okay so I've laid out the board this is similar to what we had before slight change as I've moved where the speaker is it's going over that side this is where the realtime clock will go in subsequent videos and the backup battery for the CMOS so just wanted to make sure those are all going to fit in so we can take those out now all the chips got labels on i've labeled up all the port B and uh right and read so they've all got the right pins on there i'm just going to put all those in and then we're going to wire them all up now the data bus is going to be coming from the main bus rails now it doesn't quite fit this timer chip here so what I'm going to do is to bring it in over here initially because we're going to be putting the buffers in in truck controllers over this side of the board here so the buffer is going to have a cable going from there to there and from there to there so we'll put it in here for the moment and I've also got the A0 to A7 lines coming in from down there so that's where those main ones are going to go in there so we don't have to worry about those now we just need to put in all of the power lines decoupling capacitors and when we come back we should be ready to start testing the speaker timer and the power on self test port okay so first going to do the power rails and those pins tied to 5 volts and to ground so we've got various gate signals and output enables that need to be tied to 5 volts and ground so putting in the power that's an enable various unused inputs onto there are tied to ground an output enable there then this is the gate two which actually comes from port B enables to turn on and off the oscillator for the speaker a couple of extra gate ones there as well so now we're going to do the chip selects for the power on self test port and port B read and write that's the power on self test i had actually got the labels round the wrong way on the chip label for the read and write there so now we're going to do the IOXX range there and also the IO read and IO write lines are going to feed up from the main address decoder down there up to the IO decoder and then we'll also be wiring that up to the higher up chips in a minute now we're going to do the programmer interval timer chip select and feed the IO read and IO write further up there to the timer now we need to wire in the Iite going up into the ready weight speaker PLLD and also we need to feed the A Z and A1 into the timer chip there again the label on the PLLD there had a Z0 to A7 in the wrong way around so I needed to change that later now we need to wire the clock input to the timer to the clock which is about 1.18 1.19

MHz then the output there is used for the refresh of the RAM originally and we also need to plug in the reset and we'll also wire in the pit clock as well that's the out one the reset and that is the clock going into there and the reset going up to the PL up there so now we need to wire in the speaker and the out two so out two is the oscillator for the speaker and the speaker enable and then wiring in D2D3 to the right port B there now I need to wire up the out two and the enable IO check turbo which selects between 14 and 25 MHz and the gate 2 signals there that's out two that's the ref debt which is like the refresh and then we've got the turbo going in the bottom there speaker and gate two then I just need to wire in the D0 and D1 for the port B there and also the main system clock 88 which is like 4.77 MHz normally and then we've moved the speaker circuit over to the right hand side here that has a transistor a couple of resistors and a capacitor just going to wire that in now IRQ8 comes from the RTC and needs to be inverted but it's not in use at the moment and also we're not going to be using the ready weight at this point in time but we could introduce weight states if we want to at a later point now I just need wire in the data bus really between the various chips here just plug in the Dupoint cables between those okay so finished hooking up everything now so the speaker's plugged in here what I'm just going to do is unplug the speaker output from the logic chip there and we're just going to attach a signal generator on here so here's one of the logic analyzers I've got i'm just going to hook up the power on self test port to that and there's also an oscillator output that we're just going to feed into the output stage here for the speaker just to make sure that's working okay and if you also have a look at the test program that I'm using for this this program is based on the test program that we had for the keypad and LED display and all this is going to do is to write some values to the power on self test port and also is going to configure the timer to do the 400 htz speaker beep which is one of the error codes when there's a CPU error under the BIOS so all this is going to do is to write post test first of all to the display then once we press a key it will then loop through writing the FF down to 01 to port 80 which is apparent self test port and after that it will be beep test wait for a key and then what this code here is going to do is to configure the programmable interval timer for a specific frequency which should be about 400 Hz so it should be the same as the beep that I'm going to do with the signal generator and then this should then actually beep and then when we press the key it should then stop so we just need to assemble that okay that's assembled just check the listing file yep so that looks like it should be okay so I'm just going to plug in the logic analyzer and we're just going to test the oscillator going into the beeps first okay so I've plugged in the signal generator into the input to from this yellow wire here that goes into the speaker output from the logic there we've also got the data bus for the power on self test port and there's also the chip select for the power on self test so we're going to trigger things on that so first of all I'm just going to turn on the computer and because we've got the signal generator going directly into the speaker when I turn it on we should just hear a continuous tone so I'm just going to put the microphone closer to the speaker here and we'll turn it on you should be able to hear a continuous tone sometimes the noise cancelling gets rid of the tone but as a continuous 400 Hz tone that means the speaker output's working that's good just disconnect the signal generator and plug this into speaker output okay so after I did the testing of the speaker there with the signal generator then I didn't get much further i had some problems and what I eventually found out is that I had inconsistencies in the order of the address lines so a Z to A7 on this decoder here and somehow I'd managed to have one set of documentation so the keypad and the chip labels had it one way and the PLLD configuration had it the other so I've now changed those all to be consistent put a new label on it and now it's all working so I'm just going to move the camera over to the keypad so we can actually see the software being loaded and then we'll also have a look at the logic analyzer to see what we're going to be looking at there here's the logic analyzer we've got the first eight lines the power on self test port so we'll get those codes decoded here that should go from FF down to 01 there's a number of other signals here including the post self test chip select that's what we're triggering things on and there's also other things here the out two is in fact the output of the timer into the speaker to generate the tone just to show you so this was the way how the PLLD was configured however when I did the chip labels I had seven here down to zero and also the keypad was similarly seven down to zero so when I was doing this I obviously got my wires crossed somewhere along the way but that's all now consistent and all fixed so all we're going to do now is power on the computer download the program so this is our postbeat test V1 there's one other minor issue I needed to fix as well for some reason I originally had this loaded in the 700 segment and I had one or two problems with some bite being overwritten i suspect some of the monitor is overwriting some bite somewhere so I changed it to the 6,000 range and everything seems to work okay so here we have the LED display and keypad for the monitor so I'm just going to power this on so we've got Nicom 80 AT88 version 7 so all I'm going to do first of all need to set the extra segment to now 6 0 code segment to 600 so this is where we're going to run it from now going to go into load just now going to send the srecord file down that's now finished and if we just check 0000 just to see FA's disable interrupt so that looks like that has loaded okay then I'm just now going to get this lined up to start and we just now need to get the logic analyzer ready to run and I'll just press zero so we got power on self test when I press this button it's now going to start writing the power and self test code the logic analyzer going to press the key a couple of times and we should hear the beeps you may not hear the beep that clearly because the noise cancelling on the microphone quite often cancels it out i'll press this for the beep you might be able to hear this then it stops and then we get the registers you can see all the register values there okay that seems to be working so if we just go back to the logic analyzer here do what you'll see at the very beginning here this is tri triggered on the power on self test and what you can see here the post port has got FF FE FD if you look down the right hand side here you can see this is going all the way down to 01 that looks like what we'd expect and then if we zoom out a little what we can see here this is the programmable interval timer where basically we're setting up the 400 htz tone on there and then you can actually see that this is the out to where the output of the programmable interval timer is actually giving us if you look up the right hand side here the frequency there that frequency is 400 htz that all appears to be working so now just have a look at where we've got to so we've now completed the power on self test port and port B as well we'll do a bit of testing that in the next video particularly the turbo mode and things like that which is a higher frequency version and then we've also tested the timer and speaker so in the next video we'll be looking at the in truck controllers and the real-time clock and we'll be starting to get the BIOS configured and and see what sort of information we can get for the BIOS so if you don't want to miss out on future videos then please hit subscribe and if you can hit like as well if you found the video interesting it just helps to make the videos available to more people thanks for watching

2025-04-12 13:01

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