Calibre DesignEnhancer Layout Modifications that Improve your Design -- Siemens

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[Music] so you want to improve your IC design cycle well there are probably a thousand different ways that you could trim time here and there but would any of those Tiny Steps make a big difference maybe not shifting left however yes that can improve the time it takes to make modifications to your layout and it sounds great but what concrete steps can we take to shift left and make a significant impact on our design cycle like maximizing via insertion improving the overall robustness of our designs or even reducing our IR drop what if I told you that you could do all of that and a whole lot more and do it all within a single license yep I'm talking about caliber design enhancer hi I'm Amilia Dalton host of chalk talk in this episode of chalk talk Jeff Wilson from Seamans and I investigate the variety of benefits that the caliber design enhancer brings to IC design and how this tool Suite can be used to find and fix critical design stage issues we also explore how the caliber design enhancer can identify and resolve issues early in the design flow with signoff quality Solutions and how you can utilize caliber design enhancer for your next design and before we get started don't forget to click that link there you can find even more information about this topic from Seamans hi Jeff thank you so much for joining me thank you for inviting me Absol absolutely so we're talking about layout modification and how it can improve design with the help of caliber design enhancer but Jeff before we dig into the details we're looking at improving the quality of our designs and reducing design cycle time more and more these days right so how can caliber help me with both of these design concerns well you know one of the things that we all know that caliber is the chosen physical verification tool that's used uh so widely in the industry but what we're doing is we're taking off and we are actually allowing our customers to be able to use these same core and winning algorithms much earlier in the design process and what we call it we're throwing it underneath a shift left is what we're calling these new products but really all it is doing is to be able to take and focus specialized caliber Al algorithms on particular steps in the flow that we know can be optimized better because we have customers that are asking us saying hey can you help us in these areas of our design flow and the good thing about caliber is it's used across the industry and so we get a great input from our customers about where their needs are and so we've gone off and we have taken and developed some shift left tools to be able to do this and they're really as you mentioned focused on reducing the cycle time and improving the quality of the design and what we're going to talk about today is some of those layout modifications and how you can use that effectively to be able to reduce your cycle time all right so Jeff what's all included in caliber design enhancer well caliber design enhancer is really focused on currently on three use models now this is the beginning stages we introduced this last year at DC but there are three major ones and really each one of these use models were driven by customers coming to us and saying you know what I've got a real challenge in this area can you help me and the first two of them is design enhancer via which really minimizes the IR drop by being able to maximize the number of vas that are inserted and so it really focuses on IR drop design enhancer PGE is really focused on adding both the interconnect and the VAS that you need to be able to create parallel paths in the power grid structure and those two work uh really quite closely together and focused on IR drop and Emir issues now our design enhancer PVR is really mainly focused on making sure that we shorten the time to Market and so by being able to take a procedure when the place and route gets done and it really focuses on the power performance and area targets every design has open areas between the standard cells and so those need to be filled before you can run physical verification and so what we do is is we use existing caliber technology to be able to go through and make sure that we fill those in an Optimum way and also at an Optimum performance and being able to give you the shortest possible runtime and so that is uh where the design enhancer PVR really shines those are the products that uh we have currently in there we are expanding it and we will be coming out with additional use models tied more closely to some of the concerns that customers are talking to us about today one of the great things is is that even though we just announced this a year ago we've got four of the top five fabulous companies are already using a caliber design enhancer in production and we're in a very active evaluation with the fifth one as well as a number of other customers that don't make the top five that's uh pretty much what's in design enhancer so Jeff can you walk me through the workflow of caliber a bit and how does design enhancer fit in here what we know that there are multiple different ways that people can go through and make sure that their layouts are how they're created what our objective is to make sure that we can fit seamlessly into those different design environments whether they be from Seamans with their Aza or from our competition for their place and route or their full custom editing tool and so what we do is we use industry standards such as Oasis and GDs plus uh we also support the left def interfaces for those place and Route tools and then we output all of our changes are out in an incremental dep so that they can get back in back anotated into the place and Route tools or at the same time we also generate it out in Oasis and GDs and so that the customers can start running their physical verification as soon as possible this really makes it much easier for our customers to be able to use and then we added another layer on there for ease of use since caliber is used across the board at all the leading foundaries we want to make sure that these applications are available to those customers and so we have created design kits that drive design enhancer and those kits are the important technology rules the DRC rules that go with the different applications that we're trying to achieve and then of course the layer map which is varies from Foundry to Foundry and then we also have an ability to be able to add flow specific data in there to be able to customize it by being able to have these simple asky files that is actually read into design enhancer and then we take it we look at what the use model they're trying to do and then we have very specific layout modifications that take the information from this design kit and make sure that it actually creates DRC see clean results so you don't have to get into design iterations about well this is what the place and Route tool this is what is this says well we just go ahead and we do what caliber says and since that's the industry standard um physical verification tool it is going to be the one that is going to be able to say hey it's good we can go on we really take care of all of that and so that makes it much easier for the foundaries to be able or idms to be able to support these different use models so Jeff you mentioned Vias earlier so how can caliber design enhancer help me optimize my Vias the way that it does it is because we know and we understand all of the rules related to vas there's two ways to be able to get something so that it's DRC clean and what I mean by that is you can be aggressive or you can be very conservative and I'll give you an example we had a customer that shared with this it happened to be Intel they shared when we launched the product they had a design that was DRC clean but it was having a problem with achieving their IR drop and so what they did is they gave it over to design enhancer via and now design enhancer via because it understands all the rules we don't have to be conservative we can be very aggressive we were able to add over 9 million more Vias on just the Nets that they specified then they were able to show that there was a significant drop in the r drop by being able to make make sure that you maximize the number of vas and so that's really what design enhancer V is all about is is being able to understand all the rules make sure that we get aggressive and we give the best possible results that you can find and just to give you an example of it is these are some of the different results that we've had from customers customer results always seem to be excellent results but all the customers are telling us hey we're getting DRC clean results we've got the maximum number of vas and all of that adds up to reducing IR drop and then of course for those that are going back into place and Route we can go ahead and give you an incremental def file and those that are going into full custom because we have customers using both it goes out there in the Oasis or GDs so the results that you see right there are from customers that are actually going through and showing us what design enhancer via can do either before the before and an after either in DRC count or in IR drop violations okay so you mentioned power grid enhancement earlier so talk to me about this benefit of caliber design enhancer yeah we call it design enhancer PGE and as you mentioned it stands for power grid enhancement what this really does is it goes off and looks at the layout and determines as you can see from the picture on the left it has okay this is the layout that from place and Route tool and then we says you know what there are certain Nets that we want to be able to make sure we minimize the Emir results on them therefore we create parallel paths to be able to give it another path that will lower that resistance value it's important that it not only puts it in DRC clean again that was the ultimate goal for us but that it goes out there understands the layout understands where it can put in the different metal shapes and make sure that we can also put in the vas to be able to create those parallel paths and so this Works hand inand with design enhancer via and it does take and modifies the layout obviously more than what you would do if you're just adding vas but this gets you into another aggressive for those designs that are very tight on Emir results this allows you to be able to get the best possible results in a reasonable amount of time and this here is just some customer different results I've got actually the next two slides I'll cover with you the first one is uh we did a paper at uh Dak with Google and one of the interesting things I kind of want to highlight is obviously we've officiated their design but what we have the ability to be able to do is is combine this with an emir analysis and it goes off and identifies the hotspots and then we go ahead and pass those windows into design enhancer PGE and it will just operate just on those windows to be able to attack the problem now of course since we're caliber and we have the performance that you need you can run it on the whole design but really most of the time people want to say is let's make sure that I address my hotspots get them cleaned up and then get on to my tape out so we can move forward and they see such things there as this particular customer a 90 to 94% reduction in the IR drop so proven success and again DRC clean results now the other customer that I wanted to share with you is this was actually presented at the tsmc's OIP conference and it shows the different results that they had before and after design enhan for PGE and you can see that the improvements for N3 was from 9 to 73% and uh in4 7 to 35% we have already have in2 design 2 nmet designs that are actually up and running as we move forward we'll be coming out with some more official results on that as well so these are all customers again they say it's DRC clean results and very quick turnaround for them to be able to get their job done excellent now you also mentioned PVR as well so talk to me specifically about those benefits okay so design enhancer PVR it started off in and it was focused with people coming to us and saying you know it's taking me hours once I get done with my power performance and area targets I've got all of these open areas on my design as you can see on the left in that picture there and before I can run physical verification those got to be filled but it's again taking me hours and so what we were able to do is is H one of the features the benefits that we have of being caliber is that we have technology that has been used for years to do physical modifications and one of those is our Smart Fill capability which is the industry's leading fill tool well what we're doing is we're using the same core algorithms to be able to go in there and fill the open areas by placing in Decap and filler cells into those areas that way the customer can go off and he can run his physical verification tool and of course be able to back annotate those back into the design dat database of choice the Improvement that we're getting is is the fact that it is significant and we've got on the next one I'll go ahead and show you a little bit about the chart as you can see here in the red is what the place and Route tool is taking and this is again customer data that they provided to us the blue down here which hopefully you can see it's extremely flat but that's because we're using smartfill technology and it's really has the ability to be able to almost make it within reason design size independent and so the bigger the task that you have the more complex the design the bigger the improvements you'll get from caliber design enhancer now one of the interesting things besides the runtime is is we had people come back to us and say you know what if you can help me place and guide my decoupling capacitors you're going to be able to really help me with my dynamic IR drop and so they have come up with all kinds of different ways to be able to specify that but one of the things that they want to do is they want us to achieve certain density targets with the placement of our Decap cells and we were able to show all of our customers that we if you provide us the control over it we do an excellent job of being able to deliver results on that so not only does it help time to Market but it improves the quality of your design by being able to give give us some directions of how to do that fantastic well Jeff what would you like my audience to take away from today's chalk talk well I think the important thing is is that you know we have multiple different use models and it's all used with a single license it's not like you have to go there and you have to purchase a license for deeva and a d PGE and a DVR it's like you buy one license and you're able to go ahead and use that license however your design flow needs and be able to reduce them the other thing that is important is is that we're really leveraging caliber technology to be able to deliver these results caliber technology has been proven not only do we provide DRC clean layout modifications but we understand all the rules so that we can maximize the insertion whatever the task is we need to be able to do and by supporting those industry standards it's going to allow our customer to be able to make it very easy for them to use besides us being able to be used at multiple foundaries and idms it also can be used with multiple design implementation tools we have built specific flows that our customers have asked for customers first of all they want to say hey I've got an IR drop issue how do I be able to provide the least amount of changes to my design and still be able to to address that well with design enhancer via what we do is we look at the intersections and we make sure that the maximum number of Vias are inserted by understanding all the rules we understand how to do that now if they need a little bit additional work on there of course design enhancer PGE is there to be able to look and address the Emir issues but if you're doing a large s so design and you are finding out that your time to insert DEC app and filler cells and even if you have to some technologies require m0o and cut m0 fill shapes to be added we support all of those different flows across the Technologies and so design enhancer PVR is really focused to be able to help you reduce your runtime and get your designs to Market sooner by being able to separate these technology dependent rules from our layout modific that we have we're able to move it from Foundry to Foundry very seamlessly and be able to run it across Technologies across different use physical implementation tools and be able to deliver the results that the customers need to be able to help them shift left that's pretty much what we are referring to now we have a website that uh you can go to find out more about the shift left tools and so we will go ahead and have that and a couple other links for you on the next slide well Jeff I think that's all I have time for today thank you so much for joining me thank you for inviting me and enjoyed it and before we go you didn't forget to click that link did you there you can find even more information about this topic from Seamans for chalk talks I'm Emilia Dalton from E journal.com for more chalk talks head on over to the chalk talk section of ejournal you can't miss it it's right across the top or head on over to YouTube youtube.com/ Journal

2024-12-21

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