Architecture All Access: Live at Lunar Lake ITT: Architecting Next Gen Security

Architecture All Access: Live at Lunar Lake ITT: Architecting Next Gen Security

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(bright music) - Good afternoon everybody. My name is Nivedita and I am a system security architect in the client computing group at Intel. I work with a team of great engineers and architects at Intel, and we engage and actively collaborate with our partners in the ecosystem to bring security solutions to your devices. So let me share some of the amazing and exciting things that we have developed. Hardware is a foundation to building security into a PC. I'm proud to say that at Intel, when we look at security, we look at it from a system point of view.

This is not about just building security into the hardware to make the hardware more secure, but what do we build into the hardware to make every layer in your stack secure and effectively protect the user data. Security is an ecosystem effort and there is no doubt that there is a lot of work going on by our partners in the areas of firmware and software. But being able to do this with hardware assist is what helps preserve the system security at a hardware level, and also, maintain the battery life as well as performance.

So what do we mean by looking at security from a system level? Our holistic approach to providing security for the platform is can be described across three swimlanes. The lowest level is what we call Below-the-OS security. This is how we build security into our hardware engines. Below-the-OS security is also the security that we build in the hardware to keep your firmware secure.

So things like EFI secure boot, your SOC secure boot is all part of Below-the-OS security. But this is not about just booting securely into the system, how do you make sure you stay secure? Because staying secure is important to maintain that secure foundation so you can continue to run the operating system and your runtime applications. Staying secure is the hardware capabilities that we provide to be able to patch your firmware effectively in the field with full recovery and resiliency, as well as providing the runtime protections that are needed for firmware. This is technologies like Intel Trusted Execution Technology and the runtime SMM and firmware protections that we provide.

The next swim lane is the application and data protections. This is the runtime protections that we offer for the operating system to stay more secure and prevent direct attacks that can happen on your data and your identity. When we look at application protection, what we focus on is two important areas. The first one is virtualization.

I think we all notice that the client ecosystem is moving towards what we call as a virtualization based security. With virtualization becoming more prominent on PCs, it is important to achieve two key things. One is how do we continue to provide those virtualization capabilities for security without a compromise on power and performance? So this is an important investment that Intel continues to build in our hardware. The second aspect is how do we continue to provide additional protection and security technologies that work hand in hand with the virtualization environment? I'm going to be talking about virtualization redirect protection technology, that that does exactly this.

Another aspect of the application and data protection is the crypto protections that we provide. Whether this is the memory encryption technologies like total memory encryption, total memory multi key, which become very relevant as we are looking into more complex AI workload ecosystem or this is the basic cryptographic instructions that our processor provides at a very good power and performance efficiency. The third swim lane is the advanced threat protections. Advanced threat protections can be understood as two important things.

One, it goes and addresses a larger classes of attacks. What this means is it's not looking for specific security issues and going and addressing them through specific solution, but looking at a larger class of issues, for example, control flow integrity issues, memory safety issues, post quantum issues that we are going to see in the future and addressing these things through hardware capabilities and solutions. Intel's control flow enforcement technology that we brought in couple of generations ago is a great example of advanced threat protections. The other thing that we do in the advanced threat protection is the detection capabilities. I'm gonna be shortly talking about the Intel Threat Detection Technology that helps detect ransomware and crypto jacking attacks from happening on your PC using our inbuilt capabilities of accelerated AI as well as CPU hardware telemetry. I know you're all excited to know, yes, these are the swim lanes, but what's new on Lunar Lake? So let's dive right into that.

We'll first talk about Below-the-OS security enhancements on Lunar Lake. Before we jump into Lunar Lake, a quick introduction to our security engine roadmap. A security engine that's inside the SOC plays three important roles as we see today. One is to provide the security that's required inside the silicon.

So this is basic silicon security services like root of trust, generation of keys, key management, and secure firmware loading, as well as attesting what is actually running on the silicon. The second is the Digital Rights Management that helps to run protected content securely on the PC device. And the third functionality is the System management that helps ensure that the boot of the overall SOC and the system is secure. On Alder Lake and Raptor Lake generation, we had the converge security and manageability engine that performed all these three functions. As we move into more complex architecture like the multi tile architecture and our SOC gets more complex and we also continue to see that threats are constantly evolving and getting more sophisticated, we see the need to isolate each of these functions into a different engine. On Meteor Lake, we introduce the Intel Silicon Security Engine that serves as our silicon root of trust and provides all the security services that are required for our SOC and the IP.

The Intel Graphic Security Controller that resides on the graphics processing unit that performs the functions of digital rights management for content protection and we foresee this as a way to protect AI workloads in the future. The Converge Security & Manageability Engine continues to provide services for the SOC boot, and also, the Intel Active Management Technology. With the evolving ecosystem and the AI usages, we see a need for our partners to be able to innovate and have the flexibility to have their security usages run on our SOC securely. This brings in a new area for a security engine called as Partner security. Intel is proud to bring the Intel Partner Security Engine as a new security engine on Lunar Lake. So what is Intel Partner Security Engine? Intel has long since invested in building the world class security engine hardware.

An Intel Partner Security Engine is a dedicated instance of this hardware in our Lunar Lake SOC. The design principles of the Intel Partner Security Engine are based on isolation because that is the foundation of keeping the partner usages secure. The first aspect of isolation is a dedicated offload crypto subsystem that's located on the Partner Security Engine IP hardware. Intel's offload crypto subsystem is a FIPS 140-2 certified IP block that is today part of our Intel Silicon Security Engine.

But the Intel Partner Security Engine has a dedicated instance of this block to be able to provide the cryptographic services needed for the secure boot, attestation, and all other crypto services like key storage required for the partner usages. The second aspect of isolation is an isolated fuse block and fuse controller that's, again, located on the IP itself. This means that critical fuses that are decisions made by the hardware vendor or the OEM, at the time of manufacturing, are unique to the Partner Security Engine and all critical secrets that are stored in fuses of the security engine now reside on the engine itself and the engine does not have a need to go access the SOC fuse block in order to read or write that information.

So what is this engine built for? Why do we have this on the Lunar Lake SOC? As I said, our partners will be running their specific security usages on this engine directly on the SOC. It has its own ROM and a dedicated SRAM that can be used to load third party firmware signed by our partners and run it on the SOC. So while this firmware can come from a third party, it is still securely binded to our SOC through inbuilt hardware mechanisms. The Intel Partner Security Engine hardware also has the capabilities to provide complete NIST 800-193 resiliency that the firmware could use. It also supports firmware updates through capsule and runtime update. So I've been talking about isolation as an important aspect of how we build security.

So how can we be sure that this is isolated without talking about the SOC? So I'm gonna spend a few minutes in walking through how the IP and the SOC have built--in security aspects to make sure that this engine is completely isolated and most importantly, when the partner usages run on the Intel SOC, the rest of the system security, the user's data, and the SOC security is not compromised. To demonstrate this, I'll be walking through an animation. What you see here is the memory, DRAM memory on the top and here is the fabric through which IP's access the memory.

The IPs that we are going to talk about today are the Partner Security Engine, the Intel Silicon Security Engine, the Converge Security and Manageability Engine, and the power management controller that's responsible for reboot and power management flows on the Intel SOC. When the Intel Partner Security Engine needs to access data in the memory, the accesses from the engine only go to the memory region that's dedicated to this engine. The Intel Partner Security Engine cannot access the IO and memory regions belonging to the other IPs on the same fabric. When we say IO, we are also talking about system flash.

The Partner Security Engine has a dedicated region on the system flash and it cannot access the flash region that is provided for OEM BIOS or the Intel Silicon Security Engine. Likewise, other IPs that sit on the same fabric cannot access the IOs and the memory that is specific to the Intel partner security engine. The SOC guard bands and firewalls that we have built in have always provided the protection that is needed through isolated memory architecture and IO protections. But this is not about just the resources like memory and IO another important part of the security and isolation is how the SOC booths and does this new security engine that Intel brought in play a role in the SOC boot? The answer is no. The Intel Partner Security Engine has its own independent boot flow and it does not play a role in the rest of the SOC boot. What that means is this is an optional engine that can be turned on to run partner usages and it can boot independently to the partner firmware.

It cannot communicate with the Intel Silicon Security Engine, the Converge Security or Manageability Engine or power management controller to modify the SOC boot flow in any manner. For the era of AI PC and the emerging partner usages, we definitely see the need for the partners to have the flexibility to run their usages securely on the SOC. Intel Partner Security Engine is a playground for providing to our partners to build these usages while operating within the guard bands of SOC and system security. We are now going to switch gears a little bit and talk about application and data protections and runtime security.

We brought in virtualization redirect protection technology on our Gen 12 Alder Lake products. Let's spend some time today to understand what problem is this addressing? But before that, we have to understand how address translation happens in a virtualization based environment to appreciate the problem and the solution that Intel is providing. A virtual address access that originates in a virtualized environment is translated through page tables to what is called a guest physical address.

The guest physical address using Intel Virtualization Technology provided extended page table architecture is translated to what is called as a host physical address and the host physical address is what actually points to the physical page in the DRAM. The existing Intel Virtualization Technology and the EPT architecture ensure that the hypervisor can protect the guest physical address to host physical address translations completely. But, the problem that can happen here is that the virtual address that originates from kernel mode can be completely remapped to an incorrect physical address that results in a secure kernel software accessing malicious content in a physical page.

This is called a remap attack. Another scenario is where an address translation that originates from a virtual address that is in the user mode without, again, the awareness of the hypervisor is translated to a secure content that is located in a physical page that the user mode software should not have access to. This is called as an Alias attack. The protection of an operating system is rooted on how we protect the kernel mode and the memory and the pages related to kernel mode. Kernel mode often has sensitive data and we cannot always just make it read only, writeable pages are an important aspect of how the operating system kernel functions efficiently. And addressing this problem through the right security solution without the performance impact is going to be key.

So we understand that we need to protect the paging structures from end to end and just protecting a part of the address translation is not sufficient. The Intel virtualization redirect protection technology provides the hardware capabilities to solve this problem efficiently. A paging structure that is provided by the Intel processor hardware helps ensure that there is complete address translation protection from end to end.

The hardware provided capabilities are fully managed by the hypervisor software and protected from being overwritten by an adversary. Another important aspect is how the end-to-end page walk is verified to ensure there is no translation that happens outside of the hypervisor boundary. This is achieved through hardware bits that we have added to our processor page table architecture. The hypervisor also has the flexibility to enable this only for a smaller range of pages, thus ensuring that the overall performance impact on the system with this new address translation protection is minimal. We now move on to talk about Advanced Threat Protections. The Intel Threat Detection Technology is the only AI based silicon security technology that is today running on 1 billion PCs to be able to detect ransomware and crypto jacking attacks ahead of time.

This technology does control flow monitoring of good behavior to detect if there is anything incorrect happening and flag that as a ransomware or crypto jacking attack. The technology uses CPU hardware telemetry that comes from our PMU in the hardware. And it also has memory scanning algorithms that can be offloaded to the GPU for better performance to detect fileless malware.

We actively collaborate with a lot of EDR vendors to deploy threat detection technology on endpoint devices. On Lunar Lake, the threat detection technology algorithm and fine tuning is even more enhanced with the accelerators that we have on the Lunar Lake hardware. This talk today would not be complete if we did not talk about AI security. This is a top of mind problem for Intel, our partners, as well as the US government, and I'm sure for many of you who are attending this talk today.

When we look at solving AI security, this presents a new problem, are we protecting the user from the model or the model from the user? And this problem is unique to the AI PC that the rest of the ecosystem does not have. At Intel, we strongly believe that the way we do AI security is a natural extension to how we look at overall system security across all three swim lanes. But to understand this, let's walk through how AI flows on a PC. We run a lot of applications on our systems today. The applications come with a basic signature verification for purpose of security and protection. As we move on to AI based applications, the applications are enhanced with an Intelligent algorithm or machine learning model that are built into these applications.

Depending on the sensitivity of the model itself and how high value it is, the vendors we anticipate are going to choose to encrypt the model. This means that a traditional application that you would've downloaded and installed on your PC is now going to require to be decrypted before you can even start using it. The next step is the compilation of the model. You can, we can use software like ONNX Runtime and OpenVINO to perform this compilation. But compilation, even realtime on a PC-like device is going to be time consuming if we have to repeat this multiple times when we want to reload the same application.

So storing the compile model on the PC permanently in the the storage is going to be valuable from a performance perspective, but keeping it on the PC also means that you have to protect it through encryption. The third step is the actual execution of the model where it is sent to our AI accelerators to run the inference. So what are the security considerations that we need to keep in mind to address all of these stages of AI on a PC while continuing to meet the performance and user experience that is required for AI as well as maintaining the power efficiency that is required for an AI PC? From a Below-the-OS security perspective, we continue to build security into our hardware and software foundation for AI. Whether this is the workload protection that we offer through context isolation security on our NPU or the protected Xe path technologies that we offer on our GPU accelerators, these continue to protect your workloads at the time of the inference on the accelerator. We've talked about two instances where we require efficient cryptography on our previous slide. The thing to keep in mind here is this is not traditional workloads that we are talking about.

We are talking about how do we quickly encrypt and decrypt very large size AI models. If we're talking about large language models, this are models of size of gigabytes and this really means we need to up our crypto not just from a key strength and security perspective, but also how do we ensure that we are making it performant and more power efficient. The third aspect is AI for security. We notice that security usages that are developed by software vendors are starting to migrate from the cloud to the AI PC. The two primary reasons for this are cost efficiency and faster response.

Let's look at a couple of these usages of AI for security. Trend Micro has started leveraging the Intel NPU on the Lunar Lake SOC to run their models for anti-email scam protection and they're seeing a much higher adoption through running this efficiently and more performant on an AI PC. Trend Micro also has solutions that they are building to protect the AI models themselves.

Trend Micro has a demo booth that is available. We encourage you to stop by to go understand what it is that they're building in much better detail. Let's spend a few minutes to talk about security assurance. Intel has best in class security assurance practices. We value our transparency and communication as much as we value proactively identifying and mitigating these threats.

And our security researchers are an important aspect of us being able to efficiently do this. And they partner with us on the mitigations as well as providing the response to the ecosystem on time. MITRE has published the ATLAS framework, the advanced threat landscape for artificial Intelligence systems. This is a framework that actually has a list of adversary techniques, tactics and procedures that can be used to attack AI systems. Intel is proud to partner with MITRE, and we have successfully mapped our hardware and software capabilities to 43 of these MITRE attack TTPs. To conclude, Intel continues to raise the bar on security by protecting your devices at all stages in the lifecycle.

As we embark into the transition to AI PC, we provide a secure hardware and software foundation to protect AI and everything else that runs on your device at all stages of execution. We are excited to continue to build on this as we embark on new challenges along with you all. Thank you. (audience applauding) (upbeat music)

2024-08-13 19:54

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